From: Vitaly Wool <vwool@ru.mvista.com>
To: Nicolas Pitre <nico@cam.org>
Cc: "Korolev, Alexey" <alexey.korolev@intel.com>,
linux-mtd@lists.infradead.org
Subject: Re: XIP & GCC optimization & halting
Date: Wed, 19 Oct 2005 20:47:54 +0400 [thread overview]
Message-ID: <435678BA.6080809@ru.mvista.com> (raw)
In-Reply-To: <Pine.LNX.4.64.0510191058000.5288@localhost.localdomain>
Hi,
>
>
>>Now I'm not clear about solution for the problem.
>>
>>
>
>Select only one CFI buswidth and only one chip interleave when
>configuring your kernel. That will allow gcc to precompute everything a
>t compile time and avoid the runtime divide.
>
>
Does it make sense to lock runtime divide functions in i-cache during
flash not being in linear mode?
Vitaly
next prev parent reply other threads:[~2005-10-19 16:48 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <F92C2EFE7C3BA745855BF7036E1F3F9A014CE48D@NNSMSX401>
2005-10-19 15:00 ` XIP & GCC optimization & halting Nicolas Pitre
2005-10-19 16:47 ` Vitaly Wool [this message]
2005-10-19 17:03 ` Nicolas Pitre
[not found] <F92C2EFE7C3BA745855BF7036E1F3F9A014CEB18@NNSMSX401>
2005-10-20 16:11 ` Nicolas Pitre
2005-10-17 10:35 Korolev, Alexey
2005-10-17 20:49 ` Nicolas Pitre
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