Re: [PATCH] PNX8550 NAND flash driver

Thomas Gleixner
2006-07-10T09:53:46Z

On Tue, 2006-02-14 at 15:59 +0300, Vladimir A. Barinov wrote:
> >> + }
> >> +
> >> + if (((bytes & 3) || (bytes < 16)) || ((u32) to & 3) || ((u32)
> >> from & 3)) {
> >> + if (((bytes & 1) == 0) &&
> >> + (((u32) to & 1) == 0) && (((u32) from & 1) == 0)) {
> >> + int words = bytes / 2;
> >> +
> >> + local_irq_disable();
> >> + for (i = 0; i < words; i++) {
> >> + to16[i] = from16[i];
> >> + }
> >> + local_irq_enable();
> >
> >
> > Really necessary to disable all irqs around this transfer? How long
> > can interrupts be off during that time?
>
> That is needed since the NAND device is binded to the external XIO bus
> that could be used by another devices.

Err, you have to protect the whole access sequence then. What protects
the chip against access between the command write and data read ?

If this really is a bus conflict problem, then you need some more
protection than this.

Can you please describe in detail why you think this is necessary.

tglx