From: Savin Zlobec <savin@epico.si>
To: tglx@linutronix.de
Cc: linux-mtd@lists.infradead.org
Subject: Re: [PATCH] AT91RM9200 NAND support
Date: Tue, 20 Jun 2006 14:28:04 +0200 [thread overview]
Message-ID: <4497E9D4.9040307@epico.si> (raw)
In-Reply-To: <1150804501.6780.141.camel@localhost.localdomain>
Thomas Gleixner wrote:
>On Tue, 2006-06-20 at 13:42 +0200, Savin Zlobec wrote:
>
>
>>>Well, we read the manufacturer ID. When we get 98H, how should we know
>>>that this is a Samsung part ? And I doubt that this is a quad bit flip.
>>>
>>>
>>>
>>What bothers me is that MTD from 2.6.17 reads manufacturer ID = 0xec, and
>>the latest git MTD reads 0x98. The chip on my board is Samsung.
>>
>>
>
>Thats indeed strange. Whats the exact part number ?
>
>
>
>>>Can you please remove the nand_wait_ready() call in nand_command() and
>>>test the following patch ? It disables the ready busy pin and uses the
>>>chip_delay. Please check, whether the 20us are correct. You can safely
>>>set it to 50 without breaking stuff.
>>>
>>>
>>>
>>It doesn't work with 20us nor with 50us.
>>
>>
>
>Ok, revert the patch. I really need to know which code path triggers
>this behaviour. Can you apply the patch below and compile the kernel
>with CONFIG_DEBUG_INFO.
>
>When the chip is not in READY state on entry of nand_command() debug
>info is printed. Please decode the kernel addresses of "Last caller" and
>"Current caller" with
>
>addr2line -e vmlinux 0xNNNNNNNNN
>
>
Here it is.
savin
Chip not ready in nand_command():
Last caller: c012aa04 (nand_base.c:389)
Last command: 0x70
Current caller: c012c0e8 (nand_base.c:1720)
Current command: 0x60
384 static int nand_check_wp(struct mtd_info *mtd)
385 {
386 struct nand_chip *chip = mtd->priv;
387 /* Check the WP bit */
388 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
389 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
390 }
1715 static void single_erase_cmd(struct mtd_info *mtd, int page)
1716 {
1717 struct nand_chip *chip = mtd->priv;
1718 /* Send commands to erase a block */
1719 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1720 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1721 }
next prev parent reply other threads:[~2006-06-20 12:18 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-20 6:54 [PATCH] AT91RM9200 NAND support Andrew Victor
2006-06-20 7:08 ` Thomas Gleixner
2006-06-20 7:17 ` Andrew Victor
2006-06-20 7:43 ` Savin Zlobec
2006-06-20 8:00 ` Thomas Gleixner
2006-06-20 8:08 ` Thomas Gleixner
2006-06-20 9:07 ` Savin Zlobec
2006-06-20 9:18 ` Thomas Gleixner
2006-06-20 10:49 ` Savin Zlobec
2006-06-20 11:12 ` Thomas Gleixner
2006-06-20 11:42 ` Savin Zlobec
2006-06-20 11:55 ` Thomas Gleixner
2006-06-20 12:28 ` Savin Zlobec [this message]
2006-06-20 12:44 ` Thomas Gleixner
2006-06-20 12:52 ` Thomas Gleixner
2006-06-20 13:17 ` Savin Zlobec
2006-06-20 13:01 ` Savin Zlobec
2006-06-20 13:21 ` Thomas Gleixner
2006-06-20 13:48 ` Savin Zlobec
2006-06-20 13:57 ` Thomas Gleixner
2006-06-20 14:24 ` Savin Zlobec
2006-06-20 14:24 ` Thomas Gleixner
2006-06-20 14:29 ` Thomas Gleixner
2006-06-20 15:53 ` Savin Zlobec
2006-06-20 15:53 ` Thomas Gleixner
2006-06-20 16:03 ` Savin Zlobec
2006-06-20 9:07 ` David Woodhouse
2006-06-20 9:14 ` Thomas Gleixner
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