From: Savin Zlobec <savin@epico.si>
To: tglx@linutronix.de
Cc: linux-mtd@lists.infradead.org
Subject: Re: [PATCH] AT91RM9200 NAND support
Date: Tue, 20 Jun 2006 15:01:40 +0200 [thread overview]
Message-ID: <4497F1B4.8030702@epico.si> (raw)
In-Reply-To: <1150807480.6780.157.camel@localhost.localdomain>
Thomas Gleixner wrote:
>Savin,
>
>On Tue, 2006-06-20 at 14:28 +0200, Savin Zlobec wrote:
>
>
>>Chip not ready in nand_command():
>>Last caller: c012aa04 (nand_base.c:389)
>>Last command: 0x70
>>Current caller: c012c0e8 (nand_base.c:1720)
>>Current command: 0x60
>>
>>384 static int nand_check_wp(struct mtd_info *mtd)
>>385 {
>>386 struct nand_chip *chip = mtd->priv;
>>387 /* Check the WP bit */
>>388 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
>>389 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
>>390 }
>>
>>1715 static void single_erase_cmd(struct mtd_info *mtd, int page)
>>1716 {
>>1717 struct nand_chip *chip = mtd->priv;
>>1718 /* Send commands to erase a block */
>>1719 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
>>1720 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
>>1721 }
>>
>>
>
>The status command does not influence ready/busy. The one before that
>nand_check_wp() call, is a chip reset command, but we wait for the chip
>to become ready again.
>
>Please give me the exact part number, so I can lookup the data sheet.
>
>
The part is K9F5608U0C. And I've got some more debug info.
Thanks,
savin
Chip not ready in nand_command():
Last caller: c012afa8 (nand_base.c:736)
Last command: 0x70
Current caller: c012bf8c (nand_base.c:1374)
Current command: 0x80
716 static int nand_wait(struct mtd_info *mtd, struct nand_chip
*chip, int state)
...
733 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
734 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
735 else
736 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
1367 static int nand_write_page(struct mtd_info *mtd, struct
nand_chip *chip,
1368 const uint8_t *buf, int page, int cached)
1369 {
1370 int status;
1371
1372 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1373
1374 chip->ecc.write_page(mtd, chip, buf);
Chip not ready in nand_command():
Last caller: c012afa8 (nand_base.c:736)
Last command: 0x70
Current caller: c012b644 (nand_base.c:988)
Current command: 0x00
953 static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
...
987 if (likely(sndcmd)) {
988 chip->cmdfunc(mtd,
NAND_CMD_READ0, 0x00, page);
989 sndcmd = 0;
990 }
next prev parent reply other threads:[~2006-06-20 12:53 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-06-20 6:54 [PATCH] AT91RM9200 NAND support Andrew Victor
2006-06-20 7:08 ` Thomas Gleixner
2006-06-20 7:17 ` Andrew Victor
2006-06-20 7:43 ` Savin Zlobec
2006-06-20 8:00 ` Thomas Gleixner
2006-06-20 8:08 ` Thomas Gleixner
2006-06-20 9:07 ` Savin Zlobec
2006-06-20 9:18 ` Thomas Gleixner
2006-06-20 10:49 ` Savin Zlobec
2006-06-20 11:12 ` Thomas Gleixner
2006-06-20 11:42 ` Savin Zlobec
2006-06-20 11:55 ` Thomas Gleixner
2006-06-20 12:28 ` Savin Zlobec
2006-06-20 12:44 ` Thomas Gleixner
2006-06-20 12:52 ` Thomas Gleixner
2006-06-20 13:17 ` Savin Zlobec
2006-06-20 13:01 ` Savin Zlobec [this message]
2006-06-20 13:21 ` Thomas Gleixner
2006-06-20 13:48 ` Savin Zlobec
2006-06-20 13:57 ` Thomas Gleixner
2006-06-20 14:24 ` Savin Zlobec
2006-06-20 14:24 ` Thomas Gleixner
2006-06-20 14:29 ` Thomas Gleixner
2006-06-20 15:53 ` Savin Zlobec
2006-06-20 15:53 ` Thomas Gleixner
2006-06-20 16:03 ` Savin Zlobec
2006-06-20 9:07 ` David Woodhouse
2006-06-20 9:14 ` Thomas Gleixner
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