From: Nicolas Ferre <nicolas.ferre@atmel.com>
To: linux-mtd@lists.infradead.org,
ARM Linux Mailing List <linux-arm-kernel@lists.arm.linux.org.uk>
Cc: Patrice VILCHEZ <patrice.vilchez@atmel.com>,
Andrew Victor <linux@maxim.org.za>
Subject: at91_nand: Chip Select management
Date: Wed, 12 Dec 2007 16:51:48 +0100 [thread overview]
Message-ID: <47600394.6000207@atmel.com> (raw)
Hi,
Reviewing the at91_nand code, I was wondering why the chip select was
using GPIO and moreover why this GPIO is never toggled during nand flash
accesses.
Indeed, the Chip select is asserted during the probe routine and never
released. Don't you think that it can lead to issues if we connect more
than only one nand and a sdram chip on the EBI ?
If you can enlighten me...
Cheers,
--
Nicolas Ferre
reply other threads:[~2007-12-12 15:57 UTC|newest]
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