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* nand_default_bbt and x8 large page nand devices
@ 2009-01-05 20:27 Nishanth Menon
  2009-01-05 20:31 ` Scott Wood
  0 siblings, 1 reply; 3+ messages in thread
From: Nishanth Menon @ 2009-01-05 20:27 UTC (permalink / raw)
  To: linux-mtd; +Cc: Scott Wood, maragani2000

Looping in mtd list on this.
Ref: http://www.nabble.com/-U-Boot--Bug-in-nand_default_bbt--to21237193.html

On Mon, Jan 5, 2009 at 2:01 PM, Scott Wood <scottwood@freescale.com> wrote:
> On Wed, Dec 31, 2008 at 03:31:41PM -0600, Nishanth Menon wrote:
>> A gentle question on drivers/mtd/nand/nand_bbt.c:largepage_flashbased
>> in Micron devices, the bb marker is the first word. for a x8 device is
>> 1 byte and x16 device it is 2 bytes. .len = 2 makes sense for an x16
>> device in the above variable, however the marker does a false postive
>> detection for x8 devices.
>
> Right, simplest way to work around this is to just keep the first two
> bytes reserved even on x8 devices.  If you need to maintain compatibility
> with a map that doesn't do that, then override the badblock pattern in
> the driver as you describe.
>
>> I can over ride this by using nand_chip->badblock_pattern in my board
>> file, but from an mtd layer perspective, does it make sense to fix
>> this for a generic usage?
>
> Possibly, but that's not a point on which I want to deviate from Linux.
> Feel free to try to get it changed there.

I guess the real question could be: is this a bug in reality? Do all x8 large
page devices expect 1 byte bb marker or is it just micron?

Regards,
Nishanth Menon

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: nand_default_bbt and x8 large page nand devices
  2009-01-05 20:27 nand_default_bbt and x8 large page nand devices Nishanth Menon
@ 2009-01-05 20:31 ` Scott Wood
  2009-01-05 20:39   ` Nishanth Menon
  0 siblings, 1 reply; 3+ messages in thread
From: Scott Wood @ 2009-01-05 20:31 UTC (permalink / raw)
  To: Nishanth Menon; +Cc: linux-mtd, maragani2000

Nishanth Menon wrote:
> I guess the real question could be: is this a bug in reality? Do all x8 large
> page devices expect 1 byte bb marker or is it just micron?

It's not so much a bug as just a wasted byte -- any good block should 
contain all FFs from the factory, so unless software chooses to use it 
for something else (or the controller insists on putting ECC there) it 
should be harmless to treat the bad block marker as if it were two bytes.

-Scott

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: nand_default_bbt and x8 large page nand devices
  2009-01-05 20:31 ` Scott Wood
@ 2009-01-05 20:39   ` Nishanth Menon
  0 siblings, 0 replies; 3+ messages in thread
From: Nishanth Menon @ 2009-01-05 20:39 UTC (permalink / raw)
  To: Scott Wood; +Cc: linux-mtd, maragani2000

On Mon, Jan 5, 2009 at 2:31 PM, Scott Wood <scottwood@freescale.com> wrote:
> Nishanth Menon wrote:
>>
>> I guess the real question could be: is this a bug in reality? Do all x8
>> large
>> page devices expect 1 byte bb marker or is it just micron?
>
> It's not so much a bug as just a wasted byte -- any good block should
> contain all FFs from the factory, so unless software chooses to use it for
> something else (or the controller insists on putting ECC there) it should be
> harmless to treat the bad block marker as if it were two bytes.
:( unfortunately we have a ROM code which insists on using the
offset[1] on x8 largepage nand for ecc data.
yes, as far as a wasted byte goes, it is fine, but functionality gets
hit on my SOC, hence the question.
Regards,
Nishanth Menon

^ permalink raw reply	[flat|nested] 3+ messages in thread

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