Re: [PATCH] drivers/mtd/chips/cfi_cmdset_0001.c: correct block lock timeout

["Anders Grafström" <grfstrm@users.sourceforge.net>]

Andrew Klossner wrote:
> The time parameters to WAIT_TIMEOUT are in units of microseconds, so
> one second must be expressed as 1000000 not 1000000/HZ.
> 
> The Intel Strataflash part with which this patch was tested takes 0.7
> seconds to lock/unlock, so one second does indeed seem to be a good
> timeout value.
> 
> Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
> ---
> diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
> index f5ab6fa..97f3c71 100644
> --- a/drivers/mtd/chips/cfi_cmdset_0001.c
> +++ b/drivers/mtd/chips/cfi_cmdset_0001.c
> @@ -2041,7 +2041,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
>  	 * If Instant Individual Block Locking supported then no need
>  	 * to delay.
>  	 */
> -	udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;
> +	udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000 : 0;
>  
>  	ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100);
>  	if (ret) {

If I'm not mistaken, this will change the minimum sleep time to half a second
for set lock-bit operations as well (for !XIP). Aren't those in the usec range?

The last argument to WAIT_TIMEOUT(), udelay_max, is the actual timeout.
It should have been 'udelay * HZ', i.e. it would have worked for HZ=100 but not for HZ=1000.
(The J5 datasheet says 7 seconds max clear lock-bit time, so times 10 might even be in place.)

diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index b234ab9..d2e4fdf 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -2069,7 +2069,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
 	 */
 	udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;

-	ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100);
+	ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * HZ * 10);
 	if (ret) {
 		map_write(map, CMD(0x70), adr);
 		chip->state = FL_STATUS;