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From: Dennis Millard <millard@iomega.com>
To: linux-mtd@lists.infradead.org
Subject: 4bit NAND ECC
Date: Thu, 17 Dec 2009 13:18:18 -0700	[thread overview]
Message-ID: <4B2A920A.5080808@iomega.com> (raw)

Anyone who has worked with NAND ECC support, I have a question-

    I have a platform running the 2.6.30 kernel based on the Marvell 
88F6281.  It has 512 MB NAND flash, and is very similar to the Marvell 
Sheevaplug reference design.  My Uboot is using 4bit NAND ECC to write 
the kernel and ramdisk to flash.  However, I recently discovered that 
the 2.6.30 kernel does not support 4bit ECC mode.  When I try to access 
the Uboot environment variables from the running kernel, I can only use 
1bit ECC.  When I switch Uboot to use 1bit ECC, I get lots of errors 
while accessing the Uboot vars in flash.  I've been told that I really 
should be using 4bit ECC in Uboot.

    I noticed that the 2.6.32 kernel supports 4bit ECC, but it appears 
to be only for the TI DaVinci CPU.  Can someone confirm this?  Does this 
mean that 4bit ECC is not available for general use in the 2.6.32 
kernel?  Does anyone know of a patch that would make it available for 
the Marvell 88F6281?

Thanks-
  Dennis Millard

             reply	other threads:[~2009-12-17 20:11 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-12-17 20:18 Dennis Millard [this message]
2009-12-18 19:47 ` 4bit NAND ECC Nicolas Pitre

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