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Date: Wed, 11 Sep 2013 18:54:55 +0800
From: Huang Shijie <b32955@freescale.com>
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To: Mark Brown <broonie@kernel.org>
Subject: Re: [PATCH v3 0/8] Add the Quadspi driver for vf610-twr
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=D3=DA 2013=C4=EA09=D4=C211=C8=D5 18:41, Mark Brown =D0=B4=B5=C0:
> So why does the SPI driver have references to the opcodes in it?
I admit that the Freescale's quadspi controller is very special
(it is designed too coupled with the SPI Nor FLASH),
it is driven by the LUT registers.

I just quote the comment from the patch 1:


-------------------------------------------------------------
(2) The definition of the LUT register shows below:

---------------------------------------------------
| INSTR1 | PAD1 | OPRND1 | INSTR0 | PAD0 | OPRND0 |
---------------------------------------------------

There are several types of INSTRx, such as:
CMD : the SPI NOR command.
ADDR : the address for the SPI NOR command.
DUMMY : the dummy cycles needed by the SPI NOR command.
....
-------------------------------------------------------------------

The LUT registers needs to be filled with the SPI NOR command, such
Fast-read/Quad-read.
So the Quadspi driver needs to know the spi commands, and that's why the
SPI driver has
references to the spi command opcodes.

=20
thanks
Huang Shijie