From: Huang Shijie <b32955@freescale.com>
To: Huang Shijie <b32955@freescale.com>
Cc: linux-mtd@lists.infradead.org, computersforpeace@gmail.com,
dwmw2@infradead.org, dedekind1@gmail.com
Subject: Re: [PATCH V2 0/4] mtd: gpmi: support two nand chips at most
Date: Wed, 25 Sep 2013 10:45:55 +0800 [thread overview]
Message-ID: <52424E63.6050103@freescale.com> (raw)
In-Reply-To: <1377595747-21033-1-git-send-email-b32955@freescale.com>
于 2013年08月27日 17:29, Huang Shijie 写道:
> Current gpmi-nand driver only supports one chips. But we may meet
> some embarrassing situation, such as Micron MT29F32G08QAA.
> This nand chip has two DIEs internally. Each die has its own chip select pin,
> so this chip acts as two nand chips.
>
> If we only scan one chip, we may find that we only get 2G for this chip,
> but in actually, this chip's size is 4G.
>
> So scan two chips by default.
>
> In order to support two nand chips, we have to do the following:
> 1.) Decouple the chip select from the DMA channel,
> We can use the dma 0 to access all the nand chips.
>
> 2.) fix the wrong method of checking the ready/busy status.
> In the imx6, all the ready/busy pins are binding together, we
> should check ready/busy status of chip 0 for the all the chips.
>
> Tested this patch set with MT29F32G08QAA.
>
> To Brian:
> My "better" solution was proved to be a bad idea. So i resend this
> patch set again.
>
> v1 --> v2:
> [0] rebase on the latest l2-mtd tree.
>
> Huang Shijie (4):
> mtd: gpmi: decouple the chip select from the DMA channel
> mtd: gpmi: use DMA channel 0 for all the nand chips
> mtd: gpmi: scan two nand chips
> mtd: gpmi: imx6: fix the wrong method for checking ready/busy
>
> drivers/mtd/nand/gpmi-nand/gpmi-lib.c | 13 +++++++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 7 +++----
> drivers/mtd/nand/gpmi-nand/gpmi-regs.h | 3 +++
> 3 files changed, 19 insertions(+), 4 deletions(-)
>
just a ping
next prev parent reply other threads:[~2013-09-25 2:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-27 9:29 [PATCH V2 0/4] mtd: gpmi: support two nand chips at most Huang Shijie
2013-08-27 9:29 ` [PATCH V2 1/4] mtd: gpmi: decouple the chip select from the DMA channel Huang Shijie
2013-08-27 9:29 ` [PATCH V2 2/4] mtd: gpmi: use DMA channel 0 for all the nand chips Huang Shijie
2013-08-27 17:05 ` Vikram Narayanan
2013-08-28 2:19 ` Huang Shijie
2013-08-27 9:29 ` [PATCH V2 3/4] mtd: gpmi: scan two " Huang Shijie
2013-08-27 9:29 ` [PATCH V2 4/4] mtd: gpmi: imx6: fix the wrong method for checking ready/busy Huang Shijie
2013-09-25 2:45 ` Huang Shijie [this message]
2013-10-18 6:50 ` [PATCH V2 0/4] mtd: gpmi: support two nand chips at most Huang Shijie
2013-10-19 2:01 ` Brian Norris
2013-10-21 3:40 ` Huang Shijie
2013-10-21 6:01 ` Gupta, Pekon
2013-10-21 8:32 ` Huang Shijie
2013-10-21 9:02 ` Gupta, Pekon
2013-10-22 8:16 ` Huang Shijie
2013-10-22 8:34 ` Sourav Poddar
2013-10-22 9:03 ` Huang Shijie
2013-10-23 22:37 ` Brian Norris
2013-10-23 22:59 ` Brian Norris
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=52424E63.6050103@freescale.com \
--to=b32955@freescale.com \
--cc=computersforpeace@gmail.com \
--cc=dedekind1@gmail.com \
--cc=dwmw2@infradead.org \
--cc=linux-mtd@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).