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Date: Fri, 18 Oct 2013 14:50:26 +0800
From: Huang Shijie <b32955@freescale.com>
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To: Huang Shijie <b32955@freescale.com>
Subject: Re: [PATCH V2 0/4] mtd: gpmi: support two nand chips at most
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=D3=DA 2013=C4=EA08=D4=C227=C8=D5 17:29, Huang Shijie =D0=B4=B5=C0:
> Current gpmi-nand driver only supports one chips. But we may meet
> some embarrassing situation, such as Micron MT29F32G08QAA.
> This nand chip has two DIEs internally. Each die has its own chip selec=
t pin,
> so this chip acts as two nand chips.
>
> If we only scan one chip, we may find that we only get 2G for this chip=
,
> but in actually, this chip's size is 4G.
>
> So scan two chips by default.
>
> In order to support two nand chips, we have to do the following:
>    1.) Decouple the chip select from the DMA channel,
>        We can use the dma 0 to access all the nand chips.
>
>    2.) fix the wrong method of checking the ready/busy status.
>       In the imx6, all the ready/busy pins are binding together, we
>       should check ready/busy status of chip 0 for the all the chips.=20
>
> Tested this patch set with MT29F32G08QAA.
>
> To Brian:
> 	My "better" solution was proved to be a bad idea. So i resend this
> 	patch set again.
>
> v1 --> v2:
> 	[0] rebase on the latest l2-mtd tree.
>
> Huang Shijie (4):
>   mtd: gpmi: decouple the chip select from the DMA channel
>   mtd: gpmi: use DMA channel 0 for all the nand chips
>   mtd: gpmi: scan two nand chips
>   mtd: gpmi: imx6: fix the wrong method for checking ready/busy
>
>  drivers/mtd/nand/gpmi-nand/gpmi-lib.c  |   13 +++++++++++++
>  drivers/mtd/nand/gpmi-nand/gpmi-nand.c |    7 +++----
>  drivers/mtd/nand/gpmi-nand/gpmi-regs.h |    3 +++
>  3 files changed, 19 insertions(+), 4 deletions(-)
>
Hi Artem & Brian:
Could you please merge this patch set?
it seems you have missed this patch set.


thanks
Huang Shijie