From: Michael Walle <mwalle@kernel.org>
To: Jaime Liao <jaimeliao.tw@gmail.com>
Cc: linux-mtd@lists.infradead.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, miquel.raynal@bootlin.com,
leoyu@mxic.com.tw, JaimeLiao <jaimeliao@mxic.com.tw>
Subject: Re: [PATCH v3 0/5] Add octal DTR support for Macronix flash
Date: Mon, 07 Aug 2023 08:42:59 +0200 [thread overview]
Message-ID: <5308b19bed5eb7d3dc2d87611489119d@kernel.org> (raw)
In-Reply-To: <20230804095409.278419-1-jaimeliao.tw@gmail.com>
Hi,
> Add patches for specifying the byte order in DTR mode by merging
> Tudor's patch.
I'm not sure what this has to do with this patchset. It doesn't get
used at all, nor has this something to do with the flash responding
as STR for the read_id op.
-michael
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prev parent reply other threads:[~2023-08-07 6:43 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-04 9:54 [PATCH v3 0/5] Add octal DTR support for Macronix flash Jaime Liao
2023-08-04 9:54 ` [PATCH v3 1/5] mtd: spi-nor: add Octal " Jaime Liao
2023-08-07 6:44 ` Michael Walle
2023-08-04 9:54 ` [PATCH v3 2/5] mtd: spi-nor: core: Hook manufacture by checking first byte ID Jaime Liao
2023-08-07 6:37 ` Michael Walle
2023-08-09 1:04 ` liao jaime
2023-08-10 7:27 ` Michael Walle
2023-08-11 9:03 ` liao jaime
2023-08-11 10:11 ` Tudor Ambarus
2023-08-14 8:04 ` liao jaime
2023-08-11 10:20 ` Michael Walle
2023-08-14 8:24 ` liao jaime
2023-08-31 3:18 ` liao jaime
2023-09-04 14:54 ` Michael Walle
2023-08-04 9:54 ` [PATCH v3 3/5] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2023-08-07 6:40 ` Michael Walle
2023-08-09 1:36 ` liao jaime
2023-08-10 7:31 ` Michael Walle
2023-08-04 9:54 ` [PATCH v3 4/5] mtd: spi-nor: core: " Jaime Liao
2023-08-04 9:54 ` [PATCH v3 5/5] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2023-08-07 6:42 ` Michael Walle [this message]
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