[PATCH v3 0/3] mtd: nand: support more Hynix nands

[PATCH v3 0/3] mtd: nand: support more Hynix nands

[Huang Shijie]

This patch set adds the support for more Hynix nands.

(1) H27UBG8T2CTR uses a different rule for its ID data, we have to add a new
    parsing code for it. The new rule is triggerd when the Device ID is 0xd7 and
    the process technology is <= 20nm.

(2) Add the H27UCG8T2B support.    
    The H27UCG8T2B is (16K + 1280), it use the legacy parsing rule. But needs
    a small change.


v2 -- > v3:
	[1] use the new parsing rule if the Device ID is 0xd7 and the process
	    technology is <=20 nm.
	[2] add the H27UCG8T2B support.    

Huang Shijie (3):
  mtd: nand: add a helper to parse the Hynix nand
  mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR
  mtd: nand: add support for H27UCG8T2B(16K + 1280)

 drivers/mtd/nand/nand_base.c |  140 ++++++++++++++++++++++++++++++------------
 1 files changed, 101 insertions(+), 39 deletions(-)

-- 
1.7.2.rc3

[PATCH v3 1/3] mtd: nand: add a helper to parse the Hynix nand

[Huang Shijie]

This patch adds a nand_parse_hynix() to parse the Hynix MLC nand
whose ID length is 6 bytes.

This patch makes preparations for parsing other Hynix nand.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/nand/nand_base.c |   89 +++++++++++++++++++++++------------------
 1 files changed, 50 insertions(+), 39 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 4ce8007..d6b7dc3 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3198,6 +3198,55 @@ static int nand_get_bits_per_cell(u8 cellinfo)
 	return bits + 1;
 }
 
+/* Parse for the Hynix MLC nand which has 6-bytes ID */
+static void nand_parse_hynix(struct mtd_info *mtd, struct nand_chip *chip,
+			u8 id_data[8], int *busw)
+{
+	int extid = id_data[3];
+	unsigned int tmp;
+
+	/* Calc pagesize */
+	mtd->writesize = 2048 << (extid & 0x03);
+	extid >>= 2;
+
+	/* Calc oobsize */
+	switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
+	case 0:
+		mtd->oobsize = 128;
+		break;
+	case 1:
+		mtd->oobsize = 224;
+		break;
+	case 2:
+		mtd->oobsize = 448;
+		break;
+	case 3:
+		mtd->oobsize = 64;
+		break;
+	case 4:
+		mtd->oobsize = 32;
+		break;
+	case 5:
+		mtd->oobsize = 16;
+		break;
+	default:
+		mtd->oobsize = 640;
+		break;
+	}
+	extid >>= 2;
+
+	/* Calc blocksize */
+	tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
+	if (tmp < 0x03)
+		mtd->erasesize = (128 * 1024) << tmp;
+	else if (tmp == 0x03)
+		mtd->erasesize = 768 * 1024;
+	else
+		mtd->erasesize = (64 * 1024) << tmp;
+
+	*busw = 0;
+}
+
 /*
  * Many new NAND share similar device ID codes, which represent the size of the
  * chip. The rest of the parameters must be decoded according to generic or
@@ -3259,45 +3308,7 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip,
 		*busw = 0;
 	} else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX &&
 			!nand_is_slc(chip)) {
-		unsigned int tmp;
-
-		/* Calc pagesize */
-		mtd->writesize = 2048 << (extid & 0x03);
-		extid >>= 2;
-		/* Calc oobsize */
-		switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
-		case 0:
-			mtd->oobsize = 128;
-			break;
-		case 1:
-			mtd->oobsize = 224;
-			break;
-		case 2:
-			mtd->oobsize = 448;
-			break;
-		case 3:
-			mtd->oobsize = 64;
-			break;
-		case 4:
-			mtd->oobsize = 32;
-			break;
-		case 5:
-			mtd->oobsize = 16;
-			break;
-		default:
-			mtd->oobsize = 640;
-			break;
-		}
-		extid >>= 2;
-		/* Calc blocksize */
-		tmp = ((extid >> 1) & 0x04) | (extid & 0x03);
-		if (tmp < 0x03)
-			mtd->erasesize = (128 * 1024) << tmp;
-		else if (tmp == 0x03)
-			mtd->erasesize = 768 * 1024;
-		else
-			mtd->erasesize = (64 * 1024) << tmp;
-		*busw = 0;
+		nand_parse_hynix(mtd, chip, id_data, busw);
 	} else {
 		/* Calc pagesize */
 		mtd->writesize = 1024 << (extid & 0x03);
-- 
1.7.2.rc3

[PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Huang Shijie]

The H27UBG8T2CTR is produced by the 20nm technology, and Hynix uses
different ID rules for it.

In order to parse out the correct information, we should check the
process technology and the Device ID, and then determine whether to
use a new parsing rule for this chip.

This patch adds the new parsing rule for the H27UBG8T2CTR.

Tested with H27UBG8T2CTR(8192 + 640).

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/nand/nand_base.c |   90 +++++++++++++++++++++++++++++++-----------
 1 files changed, 67 insertions(+), 23 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index d6b7dc3..2c2f7af 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3204,34 +3204,78 @@ static void nand_parse_hynix(struct mtd_info *mtd, struct nand_chip *chip,
 {
 	int extid = id_data[3];
 	unsigned int tmp;
+	bool new_rule;
 
+	/*
+	 * The ((id_data[5] & 0x7) < 4) means the nand uses >20nm technology;
+	 * The ((id_data[5] & 0x7) >= 4) means the nand uses <=20nm technology;
+	 *
+	 * Please reference to the H27UBG8T2B (p.23) and H27UBG8T2C (p.23).
+	 *
+	 * The new parsing rule is used in the H27UBG8T2C, we have to use the
+	 * process technology and the Device ID to distinguish this new rule.
+	 */
+	new_rule = ((id_data[5] & 0x7) >= 4) && (id_data[1] == 0xd7);
+
+	tmp = new_rule ? SZ_4K : SZ_2K;
 	/* Calc pagesize */
-	mtd->writesize = 2048 << (extid & 0x03);
+	mtd->writesize = tmp << (extid & 0x03);
 	extid >>= 2;
 
 	/* Calc oobsize */
-	switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
-	case 0:
-		mtd->oobsize = 128;
-		break;
-	case 1:
-		mtd->oobsize = 224;
-		break;
-	case 2:
-		mtd->oobsize = 448;
-		break;
-	case 3:
-		mtd->oobsize = 64;
-		break;
-	case 4:
-		mtd->oobsize = 32;
-		break;
-	case 5:
-		mtd->oobsize = 16;
-		break;
-	default:
-		mtd->oobsize = 640;
-		break;
+	tmp = ((extid >> 2) & 0x04) | (extid & 0x03);
+
+	if (!new_rule) {
+		switch (tmp) {
+		case 0:
+			mtd->oobsize = 128;
+			break;
+		case 1:
+			mtd->oobsize = 224;
+			break;
+		case 2:
+			mtd->oobsize = 448;
+			break;
+		case 3:
+			mtd->oobsize = 64;
+			break;
+		case 4:
+			mtd->oobsize = 32;
+			break;
+		case 5:
+			mtd->oobsize = 16;
+			break;
+		default:
+			mtd->oobsize = 640;
+			break;
+		}
+	} else {
+		switch (tmp) {
+		case 0:
+			mtd->oobsize = 640;
+			break;
+		case 1:
+			mtd->oobsize = 448;
+			break;
+		case 2:
+			mtd->oobsize = 224;
+			break;
+		case 3:
+			mtd->oobsize = 128;
+			break;
+		case 4:
+			mtd->oobsize = 64;
+			break;
+		case 5:
+			mtd->oobsize = 32;
+			break;
+		case 6:
+			mtd->oobsize = 16;
+			break;
+		default:
+			mtd->oobsize = 640;
+			break;
+		}
 	}
 	extid >>= 2;
 
-- 
1.7.2.rc3

[PATCH v3 3/3] mtd: nand: add support for H27UCG8T2B(16K + 1280)

[Huang Shijie]

Assume that:
          tmp = ((extid >> 2) & 0x04) | (extid & 0x03));

>From H27UCG8T2B's datasheet, we know that:
   (1) the oob size is 640 when the tmp is 6;
   (2) the oob size got from (1) is just the per 8K oob size.
       the real oob size should be multipled with the ((page size) / 8K).

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 drivers/mtd/nand/nand_base.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2c2f7af..5be3a71 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -3245,10 +3245,17 @@ static void nand_parse_hynix(struct mtd_info *mtd, struct nand_chip *chip,
 		case 5:
 			mtd->oobsize = 16;
 			break;
+		case 6:
+			mtd->oobsize = 640;
+			break;
 		default:
 			mtd->oobsize = 640;
 			break;
 		}
+
+		/* See H27UCG8T2B (p.22) */
+		if (mtd->writesize > SZ_8K)
+			mtd->oobsize *= mtd->writesize / SZ_8K;
 	} else {
 		switch (tmp) {
 		case 0:
-- 
1.7.2.rc3

Re: [PATCH v3 1/3] mtd: nand: add a helper to parse the Hynix nand

[Brian Norris]

On Fri, Jan 03, 2014 at 04:08:36PM +0800, Huang Shijie wrote:
> This patch adds a nand_parse_hynix() to parse the Hynix MLC nand
> whose ID length is 6 bytes.
> 
> This patch makes preparations for parsing other Hynix nand.
> 
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
>  drivers/mtd/nand/nand_base.c |   89 +++++++++++++++++++++++------------------
>  1 files changed, 50 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index 4ce8007..d6b7dc3 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -3198,6 +3198,55 @@ static int nand_get_bits_per_cell(u8 cellinfo)
>  	return bits + 1;
>  }
>  
> +/* Parse for the Hynix MLC nand which has 6-bytes ID */
> +static void nand_parse_hynix(struct mtd_info *mtd, struct nand_chip *chip,
> +			u8 id_data[8], int *busw)
> +{

Can you use 'decode' instead of 'parse', so the naming is like
nand_decode_id() and nand_decode_ext_id()?

Brian

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Brian Norris]

On Fri, Jan 03, 2014 at 04:08:37PM +0800, Huang Shijie wrote:
> The H27UBG8T2CTR is produced by the 20nm technology, and Hynix uses
> different ID rules for it.
> 
> In order to parse out the correct information, we should check the
> process technology and the Device ID, and then determine whether to
> use a new parsing rule for this chip.
> 
> This patch adds the new parsing rule for the H27UBG8T2CTR.
> 
> Tested with H27UBG8T2CTR(8192 + 640).
> 
> Signed-off-by: Huang Shijie <b32955@freescale.com>
> ---
>  drivers/mtd/nand/nand_base.c |   90 +++++++++++++++++++++++++++++++-----------
>  1 files changed, 67 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index d6b7dc3..2c2f7af 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -3204,34 +3204,78 @@ static void nand_parse_hynix(struct mtd_info *mtd, struct nand_chip *chip,
>  {
>  	int extid = id_data[3];
>  	unsigned int tmp;
> +	bool new_rule;
>  
> +	/*
> +	 * The ((id_data[5] & 0x7) < 4) means the nand uses >20nm technology;
> +	 * The ((id_data[5] & 0x7) >= 4) means the nand uses <=20nm technology;
> +	 *
> +	 * Please reference to the H27UBG8T2B (p.23) and H27UBG8T2C (p.23).
> +	 *
> +	 * The new parsing rule is used in the H27UBG8T2C, we have to use the
> +	 * process technology and the Device ID to distinguish this new rule.
> +	 */
> +	new_rule = ((id_data[5] & 0x7) >= 4) && (id_data[1] == 0xd7);

Are you sure you need to use the device ID (0xD7)? It's best if we don't
have to constrain ourselves to particular flash sizes here... Are there
Hynix MLC that don't follow the id_data[5] pattern for differentiating
technology types (>20nm vs <=20nm)? I'll have to check my datasheets
when I get back in the office.

> +
> +	tmp = new_rule ? SZ_4K : SZ_2K;

You forgot to include <linux/sizes.h> again :)

>  	/* Calc pagesize */
> -	mtd->writesize = 2048 << (extid & 0x03);
> +	mtd->writesize = tmp << (extid & 0x03);
>  	extid >>= 2;
>  
>  	/* Calc oobsize */
> -	switch (((extid >> 2) & 0x04) | (extid & 0x03)) {
> -	case 0:
> -		mtd->oobsize = 128;
> -		break;
> -	case 1:
> -		mtd->oobsize = 224;
> -		break;
> -	case 2:
> -		mtd->oobsize = 448;
> -		break;
> -	case 3:
> -		mtd->oobsize = 64;
> -		break;
> -	case 4:
> -		mtd->oobsize = 32;
> -		break;
> -	case 5:
> -		mtd->oobsize = 16;
> -		break;
> -	default:
> -		mtd->oobsize = 640;
> -		break;
> +	tmp = ((extid >> 2) & 0x04) | (extid & 0x03);
> +
> +	if (!new_rule) {
> +		switch (tmp) {
> +		case 0:
> +			mtd->oobsize = 128;
> +			break;
> +		case 1:
> +			mtd->oobsize = 224;
> +			break;
> +		case 2:
> +			mtd->oobsize = 448;
> +			break;
> +		case 3:
> +			mtd->oobsize = 64;
> +			break;
> +		case 4:
> +			mtd->oobsize = 32;
> +			break;
> +		case 5:
> +			mtd->oobsize = 16;
> +			break;
> +		default:
> +			mtd->oobsize = 640;
> +			break;
> +		}
> +	} else {
> +		switch (tmp) {
> +		case 0:
> +			mtd->oobsize = 640;
> +			break;
> +		case 1:
> +			mtd->oobsize = 448;
> +			break;
> +		case 2:
> +			mtd->oobsize = 224;
> +			break;
> +		case 3:
> +			mtd->oobsize = 128;
> +			break;
> +		case 4:
> +			mtd->oobsize = 64;
> +			break;
> +		case 5:
> +			mtd->oobsize = 32;
> +			break;
> +		case 6:
> +			mtd->oobsize = 16;
> +			break;
> +		default:
> +			mtd->oobsize = 640;
> +			break;
> +		}
>  	}
>  	extid >>= 2;
>  

Brian

Re: [PATCH v3 1/3] mtd: nand: add a helper to parse the Hynix nand

[Huang Shijie]

于 2014年03月07日 15:41, Brian Norris 写道:
> Can you use 'decode' instead of 'parse', so the naming is like
> nand_decode_id() and nand_decode_ext_id()?
>
ok.

the patch 2 uses the SZ_4K macro, so it also needs the header size.h.
I will send a new version later.

thanks
Huang Shijie

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Huang Shijie]

于 2014年03月07日 15:46, Brian Norris 写道:
> Are you sure you need to use the device ID (0xD7)? It's best if we don't
> have to constrain ourselves to particular flash sizes here... Are there
> Hynix MLC that don't follow the id_data[5] pattern for differentiating
> technology types (>20nm vs<=20nm)? I'll have to check my datasheets
> when I get back in the office.
>
The H27UCG8T2ATR is also a 20nm chip whose device ID is 0xDE. Its 
id_data[5] is 0xc4.
But it also use the old parsing rule: the page size is the multiple of 2K.

that's why i checked the device ID.

thanks
Huang Shijie

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Brian Norris]

On Fri, Mar 07, 2014 at 04:00:13PM +0800, Huang Shijie wrote:
> 于 2014年03月07日 15:46, Brian Norris 写道:
> >Are you sure you need to use the device ID (0xD7)? It's best if we don't
> >have to constrain ourselves to particular flash sizes here... Are there
> >Hynix MLC that don't follow the id_data[5] pattern for differentiating
> >technology types (>20nm vs<=20nm)? I'll have to check my datasheets
> >when I get back in the office.
> >
> The H27UCG8T2ATR is also a 20nm chip whose device ID is 0xDE. Its
> id_data[5] is 0xc4.
> But it also use the old parsing rule: the page size is the multiple of 2K.
> 
> that's why i checked the device ID.

Ugh, what a pain :( What's the point of a decode table, if we don't know
what chips to use it for?

Perhaps could it better to check for dev_id != 0xDE instead? Hopefully
there would be fewer 20nm chips that use the old table than those that
use the new.

I'll try to remember to take a look tomorrow to see how this matches
with the Hynix parts I've seen.

Brian

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Huang Shijie]

于 2014年03月07日 16:08, Brian Norris 写道:
> I'll try to remember to take a look tomorrow to see how this matches
> with the Hynix parts I've seen.
Please check it.
  you maybe have some other Hynix datatsheets which I do not have.



thanks

Huang Shijie

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Brian Norris]

On Fri, Mar 07, 2014 at 04:15:24PM +0800, Huang Shijie wrote:
> 于 2014年03月07日 16:08, Brian Norris 写道:
> >I'll try to remember to take a look tomorrow to see how this matches
> >with the Hynix parts I've seen.
> Please check it.
>  you maybe have some other Hynix datatsheets which I do not have.

FYI, I did actually check the day I promised, but the results were
inconsistent (and diasppointing) so I wasn't sure what to say...

I had a datasheet for at least one >20nm and one =20nm with the old
table. I don't think I had any with the new table.

Maybe we can just punt for now and stick some of the new part numbers in
the full-ID table?

Do you have any Hynix engineering contact that you could ask about this?
I had to pressue Toshiba a bit for info about their 24nm SLC NAND when I
added support for their bad ID decode table (commit 60c673824561).

Brian

Re: [PATCH v3 2/3] mtd: nand: add new parsing rule for Hynix's H27UBG8T2CTR

[Huang Shijie]

于 2014年03月13日 13:52, Brian Norris 写道:
> Do you have any Hynix engineering contact that you could ask about this?
I have asked the Hynix FAE, they suggested me to use the device ID to 
distinguish the
differnet NAND.

But I do not think it is a good idea to put the new Hynix nand as the 
full-id case.

thanks
Huang Shijie