Re: [RFC/PATCH 0/5 v2] mtd:ubi: Read disturb and Data retention handling

[Tanya Brokhman <tlinder@codeaurora.org>]

On 11/1/2014 12:55 AM, Jeff Lauruhn (jlauruhn) wrote:
> Hope I'm not over stepping here, but I thought I could help.  I'm a NAND AE.

Not at all. Thank you very much :)

>
> Are you using NAND or eMMC?

RAW NAND. eMMC is managed NAND so it handles this all for us :)

> If NAND why not use ECC to monitor for disturb?

We don't want just to monitor, we want to prevent cases where ecc cant 
be fixed. You said it yourself later on "BCH ECC will tell you if bits 
have changed and will correct up to 5". The goal is to prevent more then 
5 errors that can't be fixed.

NAND is a great storage unit, but you have to follow the rules.  Please 
refer to Micron datasheet MT29F2G08ABAEAH4 page 100.  NAND is made up of 
blocks(2048 in this case), each block has a number of pages.  The block 
is the smallest erasable unit and the only way to change 0's to 1's. 
Pages are the smallest programmable unit and can only change 1's to 0's. 
  P/E cycling (100,000 in this case) wears out the block.  We provide 
64bytes of spare area for BCH ECC and NAND management.  BCH ECC will 
tell you if bits have changed and will correct up to 5.
>
> Read disturb is a recoverable failure.  It doesn't affect the cells in the page you are reading it affects the cells on either side of the page you are reading.  P/E cycling for this device is 100,000.  You can program once and read many many times.
>
> Data retention is the loss of charge on the cells.  Technically you can only change a 0 to 1 by erasing the whole block.  However, data retention is the loss of charge in a cell over time. In this case data retention is 10 years.
> Data retention gets worse as temperature goes up.

Exactly! We're aware of all you described above. This is exactly why we 
need to handle both read disturb and data retention.


Thanks,
Tanya Brokhman
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