From: Richard Weinberger <richard@nod.at>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Ricard Wanderlof <ricard.wanderlof@axis.com>,
Steve deRosier <derosier@gmail.com>, Josh Wu <josh.wu@atmel.com>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
Brian Norris <computersforpeace@gmail.com>,
Huang Shijie <shijie8@gmail.com>
Subject: Re: [PATCH] mtd: nand: default bitflip-reporting threshold to 75% of correction strength
Date: Sat, 17 Jan 2015 20:54:36 +0100 [thread overview]
Message-ID: <54BABDFC.60605@nod.at> (raw)
In-Reply-To: <20150117204217.1a468f02@bbrezillon>
Am 17.01.2015 um 20:42 schrieb Boris Brezillon:
> On Sat, 17 Jan 2015 20:26:44 +0100
> Richard Weinberger <richard@nod.at> wrote:
>
>> Am 17.01.2015 um 20:01 schrieb Boris Brezillon:
>>> Just sharing my experience with MLC NANDs requiring read-retry: the
>>> number of reported bitflips often raise ecc_strength value (at least
>>> with the current read-retry approach).
>>> This patch will definitely make UBI move NAND blocks over and over
>>> again considering the threshold has been raised and the block is not
>>> reliable anymore.
>>
>> Within the last 6 months I had to face a lot of strange UBI/MTD issues.
>> All showed one "flaw" in UBI, namely that it was designed with good SLC
>> NANDs in mind.
>> Even some modern SLC NANDs show bad behavior like read disturb after
>> less than 100000 reads.
>> I think it is time to bite the bullet and improve UBI wrt. MLC NAND.
>> This is not an easy task as it needs some hardware to play with and
>> time/budget. But I think it is worth the effort.
>
> I do all my MLC tests on a cubietruck (embedding an Allwinner A20 SoC
> and a Micron MLC NAND).
Maybe I should get me one of these boards.
Despite I'm not really a fan of sunxi.
> I already started to work on randomizer/scrambler support (which are
> needed on some MLC chips), and added support for read-retry on a Micron
> non-ONFI NAND (you can find my work here [1], but it's not ready to be
> mainlined yet).
> But these are all things we can handle in the NAND layer.
Yep.
> Then comes trickier parts, like improved bitflips robustness (as
> you stated), paired pages handling (you cannot reliably write on one
> page without risking to corrupt the page it is paired with, which
> implies specific handling for such cases in upper layers: UBI/UBIFS ?),
> and surely other things I don't remember :-).
Unstable bits for example need also handling.
I really would like to get some input from NAND vendors what they want
us to solve in software.
I'm currently working on a solution for UBI to deal better with
read disturb. Within the next few week I hopefully have something sane
to share. :)
> Anyway, I'd be happy to help with any of these tasks.
Good to know!
Thanks,
//richard
next prev parent reply other threads:[~2015-01-17 19:55 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-08 3:10 NAND ECC capabilities Steve deRosier
2015-01-08 4:17 ` Ezequiel Garcia
2015-01-08 6:22 ` Steve deRosier
[not found] ` <0D23F1ECC880A74392D56535BCADD73526C0EA9A@NTXBOIMBX03.micron.com>
2015-01-08 17:09 ` Steve deRosier
2015-01-08 18:57 ` Brian Norris
2015-01-08 8:32 ` Ricard Wanderlof
2015-01-08 16:42 ` Ezequiel Garcia
2015-01-08 17:26 ` Steve deRosier
2015-01-08 19:09 ` Brian Norris
2015-01-08 19:27 ` Ezequiel Garcia
2015-01-12 8:35 ` Josh Wu
2015-01-12 20:51 ` [PATCH] mtd: nand: default bitflip-reporting threshold to 75% of correction strength Brian Norris
2015-01-13 2:01 ` Huang Shijie
2015-01-13 2:38 ` Brian Norris
2015-01-13 2:56 ` Huang Shijie
2015-01-13 13:25 ` Richard Weinberger
2015-01-13 18:48 ` Brian Norris
2015-01-13 18:51 ` Richard Weinberger
2015-01-13 19:51 ` Brian Norris
2015-01-17 19:01 ` Boris Brezillon
2015-01-17 19:26 ` Richard Weinberger
2015-01-17 19:42 ` Boris Brezillon
2015-01-17 19:54 ` Richard Weinberger [this message]
2015-01-21 8:22 ` Brian Norris
2015-01-21 8:42 ` Boris Brezillon
2015-02-10 13:50 ` Boris Brezillon
2015-01-21 7:45 ` Brian Norris
2015-01-08 17:14 ` NAND ECC capabilities Steve deRosier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=54BABDFC.60605@nod.at \
--to=richard@nod.at \
--cc=boris.brezillon@free-electrons.com \
--cc=computersforpeace@gmail.com \
--cc=derosier@gmail.com \
--cc=ezequiel@vanguardiasur.com.ar \
--cc=josh.wu@atmel.com \
--cc=linux-mtd@lists.infradead.org \
--cc=ricard.wanderlof@axis.com \
--cc=shijie8@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).