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Date: Tue, 04 Aug 2015 20:36:34 +0530
From: Archit Taneja <architt@codeaurora.org>
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To: Stephen Boyd <sboyd@codeaurora.org>
CC: devicetree@vger.kernel.org, dehrenberg@google.com,
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Subject: Re: [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148
 platform
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On 8/4/2015 2:28 AM, Stephen Boyd wrote:
> On 08/03, Archit Taneja wrote:
>> @@ -93,5 +115,19 @@
>>   		sata@29000000 {
>>   			status = "ok";
>>   		};
>> +
>> +		nand@1ac00000 {
>> +			status = "ok";
>> +
>> +			pinctrl-0 = <&nand_pins>;
>> +			pinctrl-names = "default";
>> +
>> +			nand-ecc-strength = <4>;
>> +			nand-bus-width = <8>;
>> +		};
>>   	};
>>   };
>> +
>> +&adm_dma {
>> +	status = "ok";
>> +};
>
> I think the preference is to put the full path to the device in
> the dts file and then have status = "ok". So please move this
> into the soc node and give the correct offset, etc. like we've
> done for other nodes.

I'll do that.

Archit

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