From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lithops.sigma-star.at ([195.201.40.130]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fUoHz-0003wS-GY for linux-mtd@lists.infradead.org; Mon, 18 Jun 2018 07:09:25 +0000 From: Richard Weinberger To: Masahiro Yamada Cc: linux-mtd@lists.infradead.org, Boris Brezillon , Rob Herring , linux-kbuild@vger.kernel.org, "linux-stable #4 . 14+" , devicetree@vger.kernel.org, Miquel Raynal , linux-kernel@vger.kernel.org, Marek Vasut , Brian Norris , David Woodhouse , Mark Rutland Subject: Re: [PATCH v3 1/3] mtd: rawnand: denali_dt: add more clocks based on IP datasheet Date: Mon, 18 Jun 2018 09:09:02 +0200 Message-ID: <5816516.AqyscFuYxX@blindfold> In-Reply-To: <1529025532-22087-2-git-send-email-yamada.masahiro@socionext.com> References: <1529025532-22087-1-git-send-email-yamada.masahiro@socionext.com> <1529025532-22087-2-git-send-email-yamada.masahiro@socionext.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Am Freitag, 15. Juni 2018, 03:18:50 CEST schrieb Masahiro Yamada: > According to the Denali User's Guide, this IP needs three clocks: > > - clk: controller core clock > > - clk_x: bus interface clock > > - ecc_clk: clock at which ECC circuitry is run > > Currently, denali_dt.c requires a single anonymous clock and its > frequency. However, the driver needs to get the frequency of "clk_x" > not "clk". This is confusing because people tend to assume the > anonymous clock means the core clock. In fact, I got a report of > SOCFPGA breakage because the timing parameters are calculated based > on a wrong frequency. > > Instead of the cheesy implementation, the clocks in the real hardware > should be represented in the driver and the DT-binding. > > However, adding new clocks would break the existing platforms. For the > backward compatibility, the driver still accepts a single clock just as > before. If clk_x is missing, clk_x_rate is set to a hardcoded value. > This is fine for existing DT of Socionext UniPhier, and also fixes the > issue of Altera (Intel) SOCFPGA because both platforms use 200 MHz for > the bus interface clock. > > Fixes: 1bb88666775e ("mtd: nand: denali: handle timing parameters by setup_data_interface()") > Cc: linux-stable #4.14+ > Reported-by: Richard Weinberger > Signed-off-by: Masahiro Yamada Reviewed-by: Richard Weinberger Reported-by: Philipp Rosenberger Thanks, //richard