From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f193.google.com ([209.85.167.193]) by casper.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gNn5Q-0006lx-7E for linux-mtd@lists.infradead.org; Fri, 16 Nov 2018 22:59:41 +0000 Received: by mail-oi1-f193.google.com with SMTP id t3-v6so3132201oie.7 for ; Fri, 16 Nov 2018 14:59:30 -0800 (PST) Message-ID: <5bef4bcf.1c69fb81.39c0b.e18d@mx.google.com> Date: Fri, 16 Nov 2018 16:59:26 -0600 From: Rob Herring Subject: Re: [PATCH v5 5/9] dt-bindings: spi: Adjust the bindings for the FSL QSPI driver References: <1542116782-13118-1-git-send-email-frieder.schrempf@kontron.de> <1542116782-13118-6-git-send-email-frieder.schrempf@kontron.de> In-Reply-To: <1542116782-13118-6-git-send-email-frieder.schrempf@kontron.de> Cc: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "linux-spi@vger.kernel.org" , Mark Brown CC: "dwmw2@infradead.org" , "computersforpeace@gmail.com" , "marek.vasut@gmail.com" , "richard@nod.at" , "miquel.raynal@bootlin.com" , "david.wolfe@nxp.com" , "fabio.estevam@nxp.com" , "prabhakar.kushwaha@nxp.com" , "yogeshnarayan.gaur@nxp.com" , "han.xu@nxp.com" , "shawnguo@kernel.org" , Schrempf Frieder , , Mark Rutland , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" To: Schrempf Frieder List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, 13 Nov 2018 13:47:37 +0000, Schrempf Frieder wrote: > Adjust the documentation of the new SPI memory interface based > driver to reflect the new drivers settings. > > The "old" driver was using the "fsl,qspi-has-second-chip" property to > select one of two dual chip setups (two chips on one bus or two chips > on separate buses). And it used the order in which the subnodes are > defined in the dt to select the CS, the chip is connected to. > > Both methods are wrong and in fact the "reg" property should be used to > determine which bus and CS a chip is connected to. This also enables us > to use different setups than just single chip, or symmetric dual chip. > > So the porting of the driver from the MTD to the SPI framework actually > enforces the use of the "reg" properties and makes > "fsl,qspi-has-second-chip" superfluous. > > As all boards that have "fsl,qspi-has-second-chip" set, also have > correct "reg" properties, the removal of this property shouldn't lead to > any incompatibilities. > > The only compatibility issues I can see are with imx6sx-sdb.dts and > imx6sx-sdb-reva.dts, which have their reg properties set incorrectly > (see explanation here: [2]), all other boards should stay compatible. > > Also the "big-endian" flag was removed, as this setting is now selected > by the driver, depending on which SoC is in use. > > [2] https://patchwork.ozlabs.org/patch/922817/#1925445 > > Signed-off-by: Frieder Schrempf > --- > .../devicetree/bindings/spi/spi-fsl-qspi.txt | 18 ++++++++---------- > 1 file changed, 8 insertions(+), 10 deletions(-) > Reviewed-by: Rob Herring