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[118.238.38.77]) by smtp.gmail.com with ESMTPSA id q9sm173683pfj.114.2021.12.21.15.32.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Dec 2021 15:32:08 -0800 (PST) Message-ID: <5c38b7ce-cf34-ec62-bdbd-56ee7a50e16a@gmail.com> Date: Wed, 22 Dec 2021 08:32:05 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 Subject: Re: How does an SPI NOR handle a single byte write in Octal DTR mode? Content-Language: en-US To: Michael Walle Cc: Tudor.Ambarus@microchip.com, Takahiro.Kuwano@infineon.com, juliensu@mxic.com.tw, jaimeliao@mxic.com.tw, Bacem.Daassi@infineon.com, beanhuo@micron.com, shiva.linuxworks@gmail.com, sshivamurthy@micron.com, p.yadav@ti.com, linux-mtd@lists.infradead.org References: From: Takahiro Kuwano In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211221_153210_234834_990D0D1C X-CRM114-Status: UNSURE ( 9.53 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi, I need to correct my previous statement. On 12/21/2021 12:47 AM, Michael Walle wrote: > Hi, > > Am 2021-12-20 11:32, schrieb Takahiro Kuwano: >> In case of Infineon(Cypress) S28 devices, it can be done by de-asserting >> chip select before clock falling (not sure typical controllers support this). This is true for single-byte register write op. >> That means the device can take odd address in 8D-8D-8D mode. For page program op, the S28 in 8D-8D-8D mode only supports programming multiples of 2-bytes and the address must start at an even address. > > Ahh nice. FWIW, I had a quick look at the FlexSPI controller found on > the NXP LS1028A, it doesn't seem to support deasserting the CS after > half a clock cycle, though. > > -michael Thanks, Takahiro ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/