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06 May 2020 23:38:58 -0700 Received: from [10.213.151.174] (vramuthx-mobl1.gar.corp.intel.com [10.213.151.174]) by linux.intel.com (Postfix) with ESMTP id BC1E0580378; Wed, 6 May 2020 23:38:53 -0700 (PDT) Subject: Re: [PATCH v5 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC To: Boris Brezillon References: <20200507001537.4034-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20200507001537.4034-3-vadivel.muruganx.ramuthevar@linux.intel.com> <20200507072831.1bf7f784@collabora.com> <440c0002-e572-7b8b-ba08-773932370eb0@linux.intel.com> <20200507082730.6425cd96@collabora.com> From: "Ramuthevar, Vadivel MuruganX" Message-ID: <69a06362-1f9d-bf65-4a9b-98fc6b63a391@linux.intel.com> Date: Thu, 7 May 2020 14:38:52 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <20200507082730.6425cd96@collabora.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200506_233900_017584_FD1A6076 X-CRM114-Status: GOOD ( 16.60 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: vadivel.muruganx.ramuthevar@linux.intel.com Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org, qi-ming.wu@intel.com, anders.roxell@linaro.org, vigneshr@ti.com, arnd@arndb.de, hauke.mehrtens@intel.com, richard@nod.at, brendanhiggins@google.com, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, robh+dt@kernel.org, linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com, tglx@linutronix.de, masonccyang@mxic.com.tw, andriy.shevchenko@intel.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi Boris, Thank you very much for the review comments and your time... On 7/5/2020 2:27 pm, Boris Brezillon wrote: > On Thu, 7 May 2020 14:13:42 +0800 > "Ramuthevar, Vadivel MuruganX" > wrote: > >> Hi Boris, >> >> Thank you very much for the review comments and your time... >> >> On 7/5/2020 1:28 pm, Boris Brezillon wrote: >>> On Thu, 7 May 2020 08:15:37 +0800 >>> "Ramuthevar,Vadivel MuruganX" >>> wrote: >>> >>>> + reg = readl(ebu_host->ebu + EBU_ADDR_SEL(ebu_host->cs_num)); >>>> + writel(reg | EBU_ADDR_MASK(5) | EBU_ADDR_SEL_REGEN, >>>> + ebu_host->ebu + EBU_ADDR_SEL(ebu_host->cs_num)); >>> >>> Seriously, did you really think I would not notice what you're doing >>> here? >> Yes , I know that you have very good understanding about this. >> You're reading the previous value which either contains a default >>> mapping or has the mapping set by the bootloader, and write it back to >>> the register along with a new mask and the REGEN bit set (which >>> BTW is wrong since you don't mask out other fields before updating >>> them). >> There is no other field get overwritten >> This confirms that this Core -> FPI address translation exists >>> and has to be set properly, so please stop lying about that. >> >> Sorry, there is no SW translation, as I have mentioned that it's >> optional only, for safer side , reading and writing the default values. > > Then write EBU_ADDR_SEL_REGEN and we'll if see that works. I suspect it > won't. You mean, without reading just writing EBU_ADDR_SEL_REGEN bit alone in EBU_ADDR_SELx , as you said it won't work because it overwrites 0x174 with 0x0 values so BASE is lost. either we can leave it or read & write with ORed | EBU_ADDR_SEL_REGEN Please correct me if anything is wrong, Thanks! > >> The memory region to enabled that's my concern so written the same >> register values. > > I don't buy that, sorry. > >> >> This will not be impact other fields, so please see below for reference >> >> The EBU Address Select Registers EBU_ADDR_SEL_0 to EBU_ADDSEL3 establish >> and control memory regions for external accesses. >> >> Reset Value: 17400001H > > See, as suspected the reset value is exactly what you expect. Yes , that's the reason said being optional. Regards Vadivel > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/