Re: [PATCH v5 1/2] dt-bindings: mtd: Add YAML for Nand Flash Controller support

Ramuthevar, Vadivel MuruganX
2020-05-12T03:02:55Z

Hi Rob,

Thank you for the review comments and your time...

On 11/5/2020 11:37 pm, Rob Herring wrote:
> On Thu, May 07, 2020 at 08:15:36AM +0800, Ramuthevar,Vadivel MuruganX wrote:
>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>
>> Add YAML file for dt-bindings to support NAND Flash Controller
>> on Intel's Lightning Mountain SoC.
>
> The $subject should some how reflect this is for this SoC.
Noted, will update.
>
>>
>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>> ---
>> .../devicetree/bindings/mtd/intel,lgm-nand.yaml | 85 ++++++++++++++++++++++
>> 1 file changed, 85 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
>> new file mode 100644
>> index 000000000000..69b592ae62f4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
>> @@ -0,0 +1,85 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Intel LGM SoC NAND Controller Device Tree Bindings
>> +
>> +allOf:
>> + - $ref: "nand-controller.yaml"
>> +
>> +maintainers:
>> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>> +
>> +properties:
>> + compatible:
>> + const: intel,lgm-nand-controller
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + dmas:
>> + maxItems: 2
>> +
>> + dma-names:
>> + enum:
>> + - rx
>> + - tx
>> +
>> + pinctrl-names: true
>> +
>> +patternProperties:
>> + "^pinctrl-[0-9]+$": true
>
> Don't need the pinctrl properties. The tooling adds them.
ok, will drop.
>
>> +
>> + "^nand@[a-f0-9]+$":
>> + type: object
>> + properties:
>> + reg:
>> + minimum: 0
>> + maximum: 7
>> +
>> + nand-ecc-mode: true
>> +
>> + nand-ecc-algo:
>> + const: hw
>> +
>> + additionalProperties: false
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - clock-names
>> + - dmas
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/clock/intel,lgm-clk.h>
>
> Is this applied somewhere? It's missing in my check and will break the
> build.
You have already reviewed the below patch which has the file
https://lkml.org/lkml/2020/4/17/31

Regards
Vadivel

>
>> + nand-controller@e0f00000 {
>> + compatible = "intel,nand-controller";
>> + reg = <0xe0f00000 0x100>,
>> + <0xe1000000 0x300>,
>> + <0xe1400000 0x8000>,
>> + <0xe1c00000 0x1000>;
>> + reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1";
>> + clocks = <&cgu0 LGM_GCLK_EBU>;
>> + dma-names = "tx", "rx";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + #clock-cells = <1>;
>> +
>> + nand@0 {
>> + reg = <0>;
>> + nand-on-flash-bbt;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + };
>> + };
>> +
>> +...
>> --
>> 2.11.0
>>