From: <Takahiro.Kuwano@infineon.com>
To: <mwalle@kernel.org>, <wuweimin@huaqin.corp-partner.google.com>
Cc: <tudor.ambarus@linaro.org>, <pratyush@kernel.org>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] [v3] mtd: spi-nor: gigadevice: Add support for GD25LQ255E
Date: Mon, 20 Apr 2026 09:51:13 +0000 [thread overview]
Message-ID: <792c09f5ae754bf899693f110ef1dbe0@infineon.com> (raw)
In-Reply-To: <DHXTLXWEPUDM.2LSB322E4R3ZZ@kernel.org>
Hi,
>
> On Sat Apr 18, 2026 at 10:42 AM CEST, Weimin Wu wrote:
> > Add support for the GigaDevice GD25LQ255E (JEDEC ID c8 60 19),
> > a 256Mbit (32MB) SPI NOR flash chip which supports SFDP.
> >
> > The chip supports 4K sector erase, dual read, and quad read modes.
> >
> > Link: https://download.gigadevice.com/Datasheet/DS-00562-GD25LQ255E-Rev1.2.pdf
>
> Please move the Link: tag above your SoB line.
>
> ..
>
> > diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> > index ef1edd0ad..22a430798 100644
> > --- a/drivers/mtd/spi-nor/gigadevice.c
> > +++ b/drivers/mtd/spi-nor/gigadevice.c
> > @@ -82,6 +82,10 @@ static const struct flash_info gigadevice_nor_parts[] = {
> > .size = SZ_16M,
> > .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> > .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > + }, {
> > + /* gd25lb256 */
> > + .id = SNOR_ID(0xc8, 0x60, 0x19),
> > + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
>
> Reviewed-by: Michael Walle <mwalle@kernel.org>
>
The datasheet explains (in Table 5) that BP2-BP0 control the length
of protection area (all, 1/2 ... 1/64, 0) and BP3 controls upper/lower.
It looks 3 BP and 1 TB so SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB should work.
BP4 protects top or bottom 4KB to 32KB and current SWP doesn't support
that protection mechanism, right? Sorry if I missed something...
> It looks like the gd25q256 is also missing the 4BIT_BP flag. Could
> you add second patch fixing that one, please?
>
The GD25Q256 looks 4 BP + 1 TB, according to the datasheet.
> FWIW, the GigaDevice datasheets are super confusing, sometimes there
> are 5 BP bits, where the last one is the TB, sometimes there are 4
> BP and 1 TB but only 3 BP bits are used..
>
> -michael
Thanks,
Takahiro
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next prev parent reply other threads:[~2026-04-20 9:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-18 8:42 [PATCH] [v3] mtd: spi-nor: gigadevice: Add support for GD25LQ255E Weimin Wu
2026-04-20 7:57 ` Michael Walle
2026-04-20 9:42 ` Tudor Ambarus
2026-04-20 9:51 ` Takahiro.Kuwano [this message]
2026-04-20 10:44 ` Michael Walle
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