* NAND Flash Hardware configuration?
@ 2001-09-20 6:42 Kim, Sanghun
2001-09-20 7:38 ` David Woodhouse
0 siblings, 1 reply; 4+ messages in thread
From: Kim, Sanghun @ 2001-09-20 6:42 UTC (permalink / raw)
To: linux-mtd
I'm poor in English... Sorry
I have StrongARM Board and want to use NAND Flash (Samsung).
I configured hardware as follows...
----------------------------------------------------------
StrongARM | NAND Flash
---------------------------------------------
D0 ~ D7 | IO0 ~ IO7
-----------------------------------------------------------------------------------------
WE, OE , CS | WE | CS -> WE
OE | CS -> OE
----------------------------------------------------------------------------------------------------
GPIO 23,24,25 | ALE,CLE,CE
----------------------------------------------------------------------------------------------------
and then,
kernel option select,
make zImage
download zImage,
and reboot.......
boot message----------------------------------------------------------------------------------------------
M-Systems DiskOnChip driver. (C) 1999 Machine Vision Holdings, Inc.
Using configured probe address 0x40000000
Possible DiskOnChip with unknown ChipID 85 found at 0x40000000
M-Systems NAND Flash Translation Layer driver. (C) 1999 MVHI
$Id: nftlcore.c,v 1.73 2001/06/09 01:09:43 dwmw2 Exp $
------------------------------------------------------------------------------------------------------------------
in my opinion ...
hardware configuration is wrong...
ALE,CLE,CE...
Linux how to know what GPIO maped to "ALE,CLE,CE"???
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: NAND Flash Hardware configuration?
2001-09-20 6:42 NAND Flash Hardware configuration? Kim, Sanghun
@ 2001-09-20 7:38 ` David Woodhouse
2001-09-21 11:22 ` Kim, Sanghun
0 siblings, 1 reply; 4+ messages in thread
From: David Woodhouse @ 2001-09-20 7:38 UTC (permalink / raw)
To: Kim, Sanghun; +Cc: linux-mtd, sjhill
On Thu, 20 Sep 2001, Kim, Sanghun wrote:
> M-Systems DiskOnChip driver. (C) 1999 Machine Vision Holdings, Inc.
You don't need a DiskOnChip driver. The DiskOnChip uses NAND flash, but
has other magic too. There's a separate driver for standalone NAND flash
chips.
> Linux how to know what GPIO maped to "ALE,CLE,CE"???
Yes, you're right - you'll have to write a small piece of code to teach
Linux how to drive the control lines.
drivers/mtd/nand/nand.c is a generic driver for NAND flash chips. It needs
to be coupled with a board-specific module, as you noticed. So far, I
believe that it's only been used with the 'spia' driver, which you can use
as an example for your own code.
Before invoking the generic NAND driver, the board-specific module
fills in the 'nand_chip' data structure with the virtual address of
the data port, the virtual address of the GPIO register containing the
control lines, and the three bits in that register which are connected to
each of the CLE, ALE and CE pins:
/* Set address of NAND IO lines */
this->IO_ADDR = spia_fio_base;
this->CTRL_ADDR = spia_io_base + spia_pedr;
this->CLE = 0x01;
this->ALE = 0x02;
this->NCE = 0x04;
Currently the CTRL_ADDR is treated as an 8-bit wide register. The generic
NAND code will do things like
*(volatile unsigned char *)this->CTRL_ADDR |= this->CLE;
*(volatile unsigned char *)this->CTRL_ADDR &= ~this->CLE;
This can be a little suboptimal because it means there's no locking, and
it's not very flexible - if you need a 32-bit wide register, if your
output pins are inverted, or if your three control lines are actually
spread across more than one register it can't express that.
We may need to rethink the abstraction between the generic NAND driver and
the board-specific code. I wonder how much performance would be affected
if we made it an out-of-line function call?
BTW, Steve: nand_deselect() has a superfluous '~', afaict.
#define nand_select() NAND_CTRL &= ~this->NCE; \
nand_command(mtd, NAND_CMD_RESET, -1, -1); \
udelay (10);
#define nand_deselect() NAND_CTRL |= ~this->NCE;
--
dwmw2
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: NAND Flash Hardware configuration?
2001-09-20 7:38 ` David Woodhouse
@ 2001-09-21 11:22 ` Kim, Sanghun
2001-09-21 11:26 ` David Woodhouse
0 siblings, 1 reply; 4+ messages in thread
From: Kim, Sanghun @ 2001-09-21 11:22 UTC (permalink / raw)
To: dwmw2; +Cc: linux-mtd, sjhill
Thanks...
According to Mr. Woodhose's message, I must make code like "spia.c". is it?
And, Could I see "spia board schematic"..?? , or where is it?, or specific information?
I want to use it for our "reference"
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: NAND Flash Hardware configuration?
2001-09-21 11:22 ` Kim, Sanghun
@ 2001-09-21 11:26 ` David Woodhouse
0 siblings, 0 replies; 4+ messages in thread
From: David Woodhouse @ 2001-09-21 11:26 UTC (permalink / raw)
To: Kim, Sanghun; +Cc: linux-mtd, sjhill
shkim@fdma.snu.ac.kr said:
> According to Mr. Woodhose's message, I must make code like "spia.c".
> is it?
Yes, that's right.
> And, Could I see "spia board schematic"..?? , or where is it?, or
> specific information? I want to use it for our "reference"
I don't know if the spia documentation is public, but you shouldn't need it
- I meant that you should refer to the spia.c code for an example of how to
interface with the generic NAND code.
--
dwmw2
^ permalink raw reply [flat|nested] 4+ messages in thread
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2001-09-20 6:42 NAND Flash Hardware configuration? Kim, Sanghun
2001-09-20 7:38 ` David Woodhouse
2001-09-21 11:22 ` Kim, Sanghun
2001-09-21 11:26 ` David Woodhouse
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