Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node

From: Florian Fainelli <florian.fainelli@broadcom.com>
To: William Zhang <william.zhang@broadcom.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	David Regan <dregan@broadcom.com>
Cc: dregan@mail.com, richard@nod.at, vigneshr@ti.com,
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, computersforpeace@gmail.com,
	kdasu.kdev@gmail.com, linux-mtd@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	joel.peshkin@broadcom.com, tomer.yacoby@broadcom.com,
	dan.beygelman@broadcom.com, anand.gore@broadcom.com,
	kursad.oney@broadcom.com, rafal@milecki.pl,
	bcm-kernel-feedback-list@broadcom.com, andre.przywara@arm.com,
	baruch@tkos.co.il, linux-arm-kernel@lists.infradead.org,
	dan.carpenter@linaro.org
Subject: Re: [PATCH v3 02/10] ARM: dts: broadcom: bcmbca: Add NAND controller node
Date: Wed, 24 Jan 2024 19:34:37 -0800	[thread overview]
Message-ID: <85c97d00-a973-46c6-974c-3dfa587ae873@broadcom.com> (raw)
In-Reply-To: <2c10a764-f74f-45b2-8bba-77c40468f4b5@broadcom.com>

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On 1/24/2024 7:09 PM, William Zhang wrote:
> Hi Miquel,
> 
> On 1/24/24 09:30, Miquel Raynal wrote:
>> Hi David,
>>
>> dregan@broadcom.com wrote on Tue, 23 Jan 2024 19:04:50 -0800:
>>
>>> From: William Zhang <william.zhang@broadcom.com>
>>>
>>> Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts
>>> files.
>>>
>>> Signed-off-by: William Zhang <william.zhang@broadcom.com>
>>> Reviewed-by: David Regan <dregan@broadcom.com>
>>> ---
>>> Changes in v3: None
>>> ---
>>> Changes in v2: None
>>> ---
>>>   arch/arm/boot/dts/broadcom/bcm47622.dtsi    | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm63138.dtsi    | 10 +++++++++-
>>>   arch/arm/boot/dts/broadcom/bcm63148.dtsi    | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm63178.dtsi    | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm6756.dtsi     | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm6846.dtsi     | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm6855.dtsi     | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm6878.dtsi     | 17 +++++++++++++++++
>>>   arch/arm/boot/dts/broadcom/bcm947622.dts    |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm963138.dts    |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm963138dvt.dts | 12 +++++-------
>>>   arch/arm/boot/dts/broadcom/bcm963148.dts    |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm963178.dts    |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm96756.dts     |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm96846.dts     |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm96855.dts     |  4 ++++
>>>   arch/arm/boot/dts/broadcom/bcm96878.dts     |  4 ++++
>>>   17 files changed, 165 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/broadcom/bcm47622.dtsi 
>>> b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>> index 7cd38de118c3..55ff18043d96 100644
>>> --- a/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>> +++ b/arch/arm/boot/dts/broadcom/bcm47622.dtsi
>>> @@ -138,6 +138,23 @@ hsspi: spi@1000 {
>>>               status = "disabled";
>>>           };
>>> +        nand_controller: nand-controller@1800 {
>>> +            #address-cells = <1>;
>>> +            #size-cells = <0>;
>>> +            compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", 
>>> "brcm,brcmnand";
>>> +            reg = <0x1800 0x600>, <0x2000 0x10>;
>>> +            reg-names = "nand", "nand-int-base";
>>> +            brcm,nand-use-wp = <0>;
>>> +            status = "disabled";
>>> +
>>> +            nandcs: nand@0 {
>>> +                compatible = "brcm,nandcs";
>>> +                reg = <0>;
>>> +                nand-on-flash-bbt;
>>> +                brcm,nand-ecc-use-strap;
>>
>> Describing the NAND chip in a SoC DTSI does not look relevant to me.
>> Even more if you add something like this nand-ecc-use-strap setting
>> which is very board dependent.
>>
> I am not sure if I understand you comments correctly but are you 
> suggesting to put this whole nand controller node into each board dts? 
> We have other ip block nodes like SPI, uart in this same soc dtsi file 
> too.  For all the bcmbca soc dtsi I am updating here(and its board 
> design), we always use the strap to for ecc setting.  So I thought it 
> should be okay to put brcm,nand-ecc-use-strap in the default dtsi file. 
> For any board that uses the raw nand nand-ecc property, the board dts 
> can do so and override the brcm,nand-ecc-use-strap setting.

I read Miquel's comment as meaning that the nandcs aka the NAND 
chip/flash part description should be in the board .dts file, while the 
controller itself can remain in the .dtsi file with its status = 
"disabled" property.

Are there customer boards, that is non reference boards that might chose 
a different chip select number and/or not use the strap settings?
-- 
Florian

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