From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Tudor Ambarus <tudor.ambarus@linaro.org>
Cc: Mark Brown <broonie@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Pratyush Yadav <pratyush@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Steam Lin <STLin2@winbond.com>, Santhosh Kumar K <s-k6@ti.com>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org
Subject: Re: [PATCH 02/28] spi: spi-mem: Create a repeated address operation
Date: Wed, 19 Nov 2025 18:10:50 +0100 [thread overview]
Message-ID: <871pluc5id.fsf@bootlin.com> (raw)
In-Reply-To: <0be97b27-4f8b-4d22-a653-154e87ecbc78@linaro.org> (Tudor Ambarus's message of "Wed, 5 Nov 2025 16:43:58 +0100")
Hi Tudor,
First, thank you very much for all this precious feedback! I am happy to
get feedback not only on the spi-mem side, but also on the NAND changes!
On 05/11/2025 at 16:43:58 +01, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
> On 10/31/25 6:26 PM, Miquel Raynal wrote:
>> In octal DTR mode, while the command opcode is *always* repeated,
>
> this info is wrong: opcode can be repeated, inverted or a dedicated 16bit,
> so please fix this to not mislead readers
I didn't know :) But yeah I had SPI NAND mind which was obviously
wrong. I'll correct.
>> addresses may either be long enough to cover at least two bytes (in
>> which case the existing macro works), or otherwise for single byte
>> addresses, the byte must also be duplicated and sent twice: on each
>> front of the clock. Create a macro for this common case.
>>
>> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
>> ---
>> include/linux/spi/spi-mem.h | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
>> index 81c9c7e793b6ab894675e0198d412d84b8525c2e..e4db0924898ce5b17d2b6d4269495bb968db2871 100644
>> --- a/include/linux/spi/spi-mem.h
>> +++ b/include/linux/spi/spi-mem.h
>> @@ -43,6 +43,14 @@
>> .dtr = true, \
>> }
>>
>> +#define SPI_MEM_DTR_OP_RPT_ADDR(__val, __buswidth) \
>
> I find the name too generic. This is an macro for 1 byte addresses,
> right?
Yes it is. The name mimics the "dtr command repeat" macro name. Maybe
you want to include the info that it is carrying a single byte? maybe
"*RPT_SINGLE_BYTE_ADDR"? but that's a big too long IMO. Any other idea?
Thanks,
Miquèl
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next prev parent reply other threads:[~2025-11-19 17:11 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-31 17:26 [PATCH 00/28] mtd: spinand: Octal DTR support Miquel Raynal
2025-10-31 17:26 ` [PATCH 01/28] spi: spi-mem: Make the DTR command operation macro more suitable Miquel Raynal
2025-11-05 15:35 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 02/28] spi: spi-mem: Create a repeated address operation Miquel Raynal
2025-11-05 15:43 ` Tudor Ambarus
2025-11-19 17:10 ` Miquel Raynal [this message]
2025-11-20 8:49 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 03/28] spi: spi-mem: Limit octal DTR constraints to octal DTR situations Miquel Raynal
2025-11-05 15:53 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 04/28] mtd: spinand: Fix kernel doc Miquel Raynal
2025-11-05 15:57 ` Tudor Ambarus
2025-11-19 17:18 ` Miquel Raynal
2025-11-20 8:05 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 05/28] mtd: spinand: Add missing check Miquel Raynal
2025-11-05 16:04 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 06/28] mtd: spinand: Remove stale definitions Miquel Raynal
2025-11-05 16:05 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 07/28] mtd: spinand: Use standard return values Miquel Raynal
2025-11-05 16:06 ` Tudor Ambarus
2025-11-19 17:20 ` Miquel Raynal
2025-10-31 17:26 ` [PATCH 08/28] mtd: spinand: Decouple write enable and write disable operations Miquel Raynal
2025-11-05 16:08 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 09/28] mtd: spinand: Create an array of operation templates Miquel Raynal
2025-11-05 16:17 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 10/28] mtd: spinand: Make use of the operation templates through SPINAND_OP() Miquel Raynal
2025-11-05 16:28 ` Tudor Ambarus
2025-11-19 17:23 ` Miquel Raynal
2025-11-20 8:35 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 11/28] mtd: spinand: Convert vendor drivers to SPINAND_OP() Miquel Raynal
2025-11-05 16:30 ` Tudor Ambarus
2025-11-19 17:24 ` Miquel Raynal
2025-10-31 17:26 ` [PATCH 12/28] mtd: spinand: macronix: Convert vendor specific operation " Miquel Raynal
2025-11-05 16:40 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 13/28] mtd: spinand: winbond: Convert W25N " Miquel Raynal
2025-11-05 16:40 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 14/28] mtd: spinand: winbond: Convert W35N " Miquel Raynal
2025-11-05 16:41 ` Tudor Ambarus
2025-10-31 17:26 ` [PATCH 15/28] mtd: spinand: List vendor specific operations and make sure they are supported Miquel Raynal
2025-10-31 17:27 ` [PATCH 16/28] mtd: spinand: macronix: Register vendor specific operation Miquel Raynal
2025-10-31 17:27 ` [PATCH 17/28] mtd: spinand: winbond: Register W25N " Miquel Raynal
2025-10-31 17:27 ` [PATCH 18/28] mtd: spinand: winbond: Register W35N " Miquel Raynal
2025-10-31 17:27 ` [PATCH 19/28] mtd: spinand: winbond: Fix style Miquel Raynal
2025-10-31 17:27 ` [PATCH 20/28] mtd: spinand: winbond: Rename IO_MODE register macro Miquel Raynal
2025-10-31 17:27 ` [PATCH 21/28] mtd: spinand: winbond: Configure the IO mode after the dummy cycles Miquel Raynal
2025-10-31 17:27 ` [PATCH 22/28] mtd: spinand: Gather all the bus interface steps in one single function Miquel Raynal
2025-10-31 17:27 ` [PATCH 23/28] mtd: spinand: Add support for setting a bus interface Miquel Raynal
2025-10-31 17:27 ` [PATCH 24/28] mtd: spinand: Propagate the bus interface across core helpers Miquel Raynal
2025-10-31 17:27 ` [PATCH 25/28] mtd: spinand: Give the bus interface to the configuration helper Miquel Raynal
2025-10-31 17:27 ` [PATCH 26/28] mtd: spinand: Warn if using SSDR-only vendor commands in a non SSDR mode Miquel Raynal
2025-10-31 17:27 ` [PATCH 27/28] mtd: spinand: Add octal DTR support Miquel Raynal
2025-10-31 17:27 ` [PATCH 28/28] mtd: spinand: winbond: W35N " Miquel Raynal
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