From: Miquel Raynal <miquel.raynal@bootlin.com>
To: "han.xu" <han.xu@oss.nxp.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Peter Pan <peterpandong@micron.com>,
Boris Brezillon <bbrezillon@kernel.org>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Han Xu <han.xu@nxp.com>
Subject: Re: [PATCH] mtd: spinand: Enable QE on all dies
Date: Thu, 13 Aug 2026 08:48:47 +0200 [thread overview]
Message-ID: <87v79eldm8.fsf@bootlin.com> (raw)
In-Reply-To: <anowMUOYurNYphfU@cozumel> (han xu's message of "Wed, 12 Aug 2026 11:34:26 -0500")
>> > + /*
>> > + * QE is a per-die setting on some devices. Program each target
>> > + * individually when enabling or disabling quad I/O mode.
>> > + */
>> > + for (target = 0; target < nand->memorg.ntargets; target++) {
>> > + ret = spinand_select_target(spinand, target);
>> > + if (ret)
>> > + return ret;
>> > +
>> > + ret = spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
>> > + enable ? CFG_QUAD_ENABLE : 0);
>> > + if (ret)
>> > + return ret;
>>
>> If there is an issue in the middle of the loop, the chip will become
>> unusable. Perhaps we should reset the dies to the !QE state and return
>> an error to continue in degraded (single) mode if that happens?
>
>
> Single-lane is the most basic op - if the QE set_feature write fails, the link
> is broken and single-lane won't work anyway. And falling back needs the vendor's
> own 1S op stored somewhere, but those variant tables are discarded after probe.
> So it likely requires refactoring struct spinand_device to cache them. Given that,
> maybe just keep the current return-error implementation.
Ack.
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prev parent reply other threads:[~2026-08-13 6:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 23:11 [PATCH] mtd: spinand: Enable QE on all dies han.xu
2026-08-10 7:58 ` Miquel Raynal
2026-08-12 16:34 ` han.xu
2026-08-13 6:48 ` Miquel Raynal [this message]
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