[PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Ziyang Huang]

This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.

The issue George met is due to the limit of QPIC, not the issue of the
flash chip.

QPIC only supports 4 bytes ID. So the fifth byte is always 0.

If we use spi-gpio, the fifth byte can be read correctly.

Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
---
 drivers/mtd/nand/spi/esmt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
index 9a9325c0bc49..c1285d52d458 100644
--- a/drivers/mtd/nand/spi/esmt.c
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -199,7 +199,7 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
 		     SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
 	SPINAND_INFO("F50D1G41LB",
 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
-				0x7f),
+				0x7f, 0x7f),
 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
 		     NAND_ECCREQ(1, 512),
 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-- 
2.40.1


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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Miquel Raynal]

On 02/12/2025 at 23:05:56 +08, Ziyang Huang <hzyitc@outlook.com> wrote:

> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>
> The issue George met is due to the limit of QPIC, not the issue of the
> flash chip.
>
> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>
> If we use spi-gpio, the fifth byte can be read correctly.
>
> Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
> ---

So how do we solve that?

Is there anything than can be done on the qpic side?

Thanks,
Miquèl

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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[George Moussalem]

On 12/8/25 12:33, Miquel Raynal wrote:
> On 02/12/2025 at 23:05:56 +08, Ziyang Huang <hzyitc@outlook.com> wrote:
> 
>> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>>
>> The issue George met is due to the limit of QPIC, not the issue of the
>> flash chip.
>>
>> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>>
>> If we use spi-gpio, the fifth byte can be read correctly.
>>
>> Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
>> ---
> 
> So how do we solve that?
> 
> Is there anything than can be done on the qpic side?

Hi Alam,

Is the hardware itself limited to reading 4 ID bytes only or is it a
driver limitation?

> 
> Thanks,
> Miquèl

Best regards,
George

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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Md Sadre Alam]

Hi,

On 12/8/2025 2:56 PM, George Moussalem wrote:
> 
> 
> On 12/8/25 12:33, Miquel Raynal wrote:
>> On 02/12/2025 at 23:05:56 +08, Ziyang Huang <hzyitc@outlook.com> wrote:
>>
>>> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>>>
>>> The issue George met is due to the limit of QPIC, not the issue of the
>>> flash chip.
>>>
>>> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>>>
>>> If we use spi-gpio, the fifth byte can be read correctly.
>>>
>>> Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
>>> ---
>>
>> So how do we solve that?
>>
>> Is there anything than can be done on the qpic side?
> 
> Hi Alam,
> 
> Is the hardware itself limited to reading 4 ID bytes only or is it a
> driver limitation?

The hardware itself is limited to returning 4 ID bytes. QPIC reads the 
device ID and places it into the QPIC_NAND_FLASH_READ_ID register, which 
is 32‑bit wide. As a result, only 4 bytes of the device ID are available 
to software. The register stores the ID bytes in the order [31:24] = 
byte 3, [23:16] = byte 2, [15:8] = byte 1, [7:0] = byte 0.

Thanks,
Alam.


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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Miquel Raynal]

Hi,

>>> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>>>
>>> The issue George met is due to the limit of QPIC, not the issue of the
>>> flash chip.
>>>
>>> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>>>
>>> If we use spi-gpio, the fifth byte can be read correctly.
>>>
>>> Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
>>> ---
>> 
>> So how do we solve that?
>> 
>> Is there anything than can be done on the qpic side?
>
> Hi Alam,
>
> Is the hardware itself limited to reading 4 ID bytes only or is it a
> driver limitation?

FYI I will pick the revert, because indeed the original fix is wrong and
any device with 5 ID bytes would need a similar change (which is not
possible), and let you figure out a quirk for the Qpic driver.

Thanks,
Miquèl

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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Ziyang Huang]

在 2025/12/8 16:33, Miquel Raynal 写道:
> On 02/12/2025 at 23:05:56 +08, Ziyang Huang <hzyitc@outlook.com> wrote:
> 
>> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
>>
>> The issue George met is due to the limit of QPIC, not the issue of the
>> flash chip.
>>
>> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
>>
>> If we use spi-gpio, the fifth byte can be read correctly.
>>
>> Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
>> ---
> 
> So how do we solve that?
> 
> Is there anything than can be done on the qpic side?
> 
> Thanks,
> Miquèl

Unfortunately, There is not a good way to solve it now.

In Openwrt, I made a hack to force the max compare bytes to 4.

I'm trying to find a way to let QPIC do a raw SPI op. But without 
documents, it's hard.

For router devices, an other typical way is to use parameter page. This 
feature is supported in almost all of the high-speed QSPI NANDs they used.

But for now, 4 bytes is enough for the router devices since only a few 
flash models will be used. More the that, some vendor SDKs use 2 bytes.




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Re: [PATCH] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"

[Miquel Raynal]

On Tue, 02 Dec 2025 23:05:56 +0800, Ziyang Huang wrote:
> This reverts commit dd26402642a0899fde59ea6b0852fad3d799b4cc.
> 
> The issue George met is due to the limit of QPIC, not the issue of the
> flash chip.
> 
> QPIC only supports 4 bytes ID. So the fifth byte is always 0.
> 
> [...]

Applied to mtd/fixes, thanks!

[1/1] Revert "mtd: spinand: esmt: fix id code for F50D1G41LB"
      commit: 2f6d2c8d9ac05a7a1c02333f6ad30868246880d8

Patche(s) should be available on mtd/linux.git and will be
part of the next PR (provided that no robot complains by then).

Kind regards,
Miquèl


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