From: <Tudor.Ambarus@microchip.com>
To: <marek.vasut@gmail.com>, <vigneshr@ti.com>,
<boris.brezillon@collabora.com>, <miquel.raynal@bootlin.com>,
<richard@nod.at>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support
Date: Fri, 23 Aug 2019 16:07:46 +0000 [thread overview]
Message-ID: <8e8e85e2-9645-0c1d-0c02-171185567fd9@microchip.com> (raw)
In-Reply-To: <20190823160452.14905-1-tudor.ambarus@microchip.com>
This has nothing to do with the move manufacturer out of the spi-nor core
pursue, but depends on:
https://patchwork.ozlabs.org/project/linux-mtd/list/?series=127030
On 08/23/2019 07:05 PM, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>
> This is similar with what other nor flashes are doing by clearing the
> block protection bits from the status register: disable the write
> protection after a power-on reset cycle.
>
> The Global Block-Protection Unlock command offers a single command cycle
> that unlocks the entire memory array. Prefer this method for higher
> throughput.
>
> Tested on the sst26vf064b flash using the atmel-quadspi driver.
>
> Tudor Ambarus (2):
> mtd: spi-nor: add Global Block Unlock support
> mtd: spi-nor: unlock global block protection on sst26vf064b
>
> drivers/mtd/spi-nor/spi-nor.c | 51 +++++++++++++++++++++++++++++++++++++++++--
> include/linux/mtd/spi-nor.h | 1 +
> 2 files changed, 50 insertions(+), 2 deletions(-)
>
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prev parent reply other threads:[~2019-08-23 16:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-23 16:05 [PATCH 0/2] mtd: spi-nor: add Global Block Unlock support Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 1/2] " Tudor.Ambarus
2019-08-23 16:05 ` [PATCH 2/2] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor.Ambarus
2019-08-23 16:07 ` Tudor.Ambarus [this message]
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