From: "Michael Walle" <mwalle@kernel.org>
To: "Bough Chen" <haibo.chen@nxp.com>,
"Tudor Ambarus" <tudor.ambarus@linaro.org>,
"Pratyush Yadav" <pratyush@kernel.org>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>
Cc: "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Han Xu" <han.xu@nxp.com>,
"open list:NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER"
<imx@lists.linux.dev>
Subject: Re: [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba"
Date: Fri, 12 Dec 2025 10:25:40 +0100 [thread overview]
Message-ID: <DEW4P4X1DBYG.1Q3T05DX2784P@kernel.org> (raw)
In-Reply-To: <DU0PR04MB94960504A809674A265689D690AEA@DU0PR04MB9496.eurprd04.prod.outlook.com>
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Hi,
>> > Find two batches mt35xu512aba has different SFDP but with same jedec
>> > ID. To make all batches of mt35xu512aba work well and support OCT DTR
>> > mode, back to hardcode the flags.
>>
>> What are "batches" in this case? A new revision of the same flash chip? Why
>> would they use a different ID then.
>
> Hi Michael,
>
> Yes, seems a new revision of the same flash chip. Anyone from Micron can confirm this?
>
> What's the normal way for vendors to update the SFDP? Seems also need to update/change the ID.
No why would they? It's the same flash, but with new/fixed SFDP.
>> What's wrong with the parsed flags? Both support SFDP, so if you really need to
>> fixup any flags, please use a fixup callback to actually fix them. But first, what
>> will go wrong?
>
> Yes, sorry to lack this information.
>
> For mt35xu512aba chip with label 0DA15 RW303, the SFDP do not support OCT DTR read/write operation,
> but still has one .fixups = &mt35xu512aba_fixups, in this fix up, it config the OCT DTR read operation, so
> finally read_proto == SNOR_PROTO_8_8_8_DTR, but nor->write_proto == SNOR_PROTO_1_1_1, then has
> no chance to call micron_st_nor_octal_dtr_en(), when there is read operation, use OCT DTR read command
> meet issue.
>
> With this revert patch, I test mt35xu512aba chip with label 0DA15 RW303, OCT DTR mode can work well.
> Also test mt35xu512aba chip with label 4KA17 RW303, OCT DTR mode work find too.
So both support actual octal mode. Then please fix
mt35xu512aba_fixups. IIUC, you can just use
spi_nor_set_pp_settings() there, to fixup the supported PP mode. But
please add it with a comment describe *why* we need that fixup.
-michael
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next prev parent reply other threads:[~2025-12-12 9:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-12 8:30 [PATCH] Revert "mtd: spi-nor: micron-st: use SFDP of mt35xu512aba" Haibo Chen
2025-12-12 8:34 ` Michael Walle
2025-12-12 9:03 ` Bough Chen
2025-12-12 9:25 ` Michael Walle [this message]
2025-12-12 10:04 ` Bough Chen
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