From: "Michael Walle" <mwalle@kernel.org>
To: "Shiji Yang" <yangshiji66@outlook.com>, <linux-mtd@lists.infradead.org>
Cc: "Tudor Ambarus" <tudor.ambarus@linaro.org>,
"Pratyush Yadav" <pratyush@kernel.org>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] mtd: spi-nor: swp: check SR_TB flag when getting tb_mask
Date: Mon, 09 Feb 2026 11:31:25 +0100 [thread overview]
Message-ID: <DGAD1M64X2PO.3CLYHIAZQRLI7@kernel.org> (raw)
In-Reply-To: <TYRPR01MB135884849485DE52A81D94965BC91A@TYRPR01MB13588.jpnprd01.prod.outlook.com>
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On Wed Jan 28, 2026 at 1:42 PM CET, Shiji Yang wrote:
> When the chip does not support top/bottom block protect, the tb_mask
> must be set to 0, otherwise SR1 bit5 will be unexpectedly modified.
>
> Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
It goes all the way back to the very first commit..
Fixes: 3dd8012a8eeb ("mtd: spi-nor: add TB (Top/Bottom) protect support")
Reviewed-by: Michael Walle <mwalle@kernel.org>
-michael
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next prev parent reply other threads:[~2026-02-09 10:31 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 12:42 [PATCH] mtd: spi-nor: swp: check SR_TB flag when getting tb_mask Shiji Yang
2026-01-28 14:11 ` Miquel Raynal
2026-02-09 10:31 ` Michael Walle [this message]
2026-03-13 11:15 ` Pratyush Yadav
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