On Sun Feb 8, 2026 at 7:19 AM CET, Eliav Farber wrote:
> The Winbond w25q256jwm device supports four Block Protect (BP) bits and
> uses Status Register bit 6 as the Top/Bottom (TB) protect bit.
>
> Update the flash parameters by enabling SPI_NOR_4BIT_BP and
> SPI_NOR_TB_SR_BIT6. Without these flags, the locking configuration is
> incorrect.
>
> Reference:
> https://www.winbond.com/hq/support/documentation/levelOne.jsp?__locale=en&DocNo=DA00-W25Q256JW.1
>
> Signed-off-by: Eliav Farber <farbere@amazon.com>
> ---
>  drivers/mtd/spi-nor/winbond.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
> index fb855fe44733..55f1209936d5 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -337,7 +337,7 @@ static const struct flash_info winbond_nor_parts[] = {
>  		.id = SNOR_ID(0xef, 0x80, 0x19),
>  		.name = "w25q256jwm",
>  		.size = SZ_32M,
> -		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> +		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  	}, {
>  		.id = SNOR_ID(0xef, 0x80, 0x20),

Reviewed-by: Michael Walle <mwalle@kernel.org>

-michael