* [PATCH] mtd: spi-nor: gigadevice: add support for GD25LQ255E
@ 2026-02-13 14:41 Weimin Wu
2026-02-16 8:38 ` Michael Walle
0 siblings, 1 reply; 2+ messages in thread
From: Weimin Wu @ 2026-02-13 14:41 UTC (permalink / raw)
To: tudor.ambarus; +Cc: pratyush, mwalle, linux-mtd, linux-kernel, Weimin Wu
gd25lq255e is similar with gd25lq256d, has 32MB of total capacity.
It support Quad Page Program which mean programming the memory using
four pins: IO0, IO1, IO2, and IO3.
Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
---
/ # cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
gd25lq256d
/ # cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
gigadevice
/ # cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c86019
/ # xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060102ff00060110300000ffc8000103900000ff84000102c000
00ffffffffffffffffffffffffffffffffffe520f3ffffffff0f44eb086b
083b42bbfeffffffffff00ffffff44eb0c200f5210d800ffd439a5fe82e4
1452ec6216337a757a7504bdd55c2906140008500001ffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffff002050169df9
77648fdbffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffff0effff215cdcff
/ # sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
9f56d460181f7c0b6cc16a69554e3b587948b5f65323e976d0a4f1dbbcb93d94 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
/ # cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-1S (fast read)
opcode 0x0c
mode cycles 0
dummy cycles 8
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
/ # cat /sys/kernel/debug/spi-nor/spi0.0/params
name gd25lq256d
id c8 60 19 c8 60 19
size 32.0 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | NO_READ_CR | SOFT_RESET
opcodes
read 0x0c
dummy cycles 8
erase 0xdc
program 0x12
8D extension none
protocols
read 1S-1S-1S
write 1S-1S-1S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
5c (32.0 KiB) [2]
dc (64.0 KiB) [3]
c7 (32.0 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+----------
00000000-01ffffff | [ 3] | no
---
drivers/mtd/spi-nor/gigadevice.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index ef1edd0ad..356a3f196 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -82,6 +82,12 @@ static const struct flash_info gigadevice_nor_parts[] = {
.size = SZ_16M,
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+ }, {
+ .id = SNOR_ID(0xc8, 0x60, 0x19),
+ .name = "gd25lq256d",
+ .size = SZ_32M,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_QUAD_PP,
+ .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
},
};
--
2.43.0
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] mtd: spi-nor: gigadevice: add support for GD25LQ255E
2026-02-13 14:41 [PATCH] mtd: spi-nor: gigadevice: add support for GD25LQ255E Weimin Wu
@ 2026-02-16 8:38 ` Michael Walle
0 siblings, 0 replies; 2+ messages in thread
From: Michael Walle @ 2026-02-16 8:38 UTC (permalink / raw)
To: Weimin Wu, tudor.ambarus; +Cc: pratyush, linux-mtd, linux-kernel
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On Fri Feb 13, 2026 at 3:41 PM CET, Weimin Wu wrote:
> gd25lq255e is similar with gd25lq256d, has 32MB of total capacity.
> It support Quad Page Program which mean programming the memory using
> four pins: IO0, IO1, IO2, and IO3.
Did you do basic tests, like described in [1]?
> Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
>
> ---
> / # cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
> gd25lq256d
>
> / # cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
> gigadevice
>
> / # cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
> c86019
>
> / # xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
> 53464450060102ff00060110300000ffc8000103900000ff84000102c000
> 00ffffffffffffffffffffffffffffffffffe520f3ffffffff0f44eb086b
> 083b42bbfeffffffffff00ffffff44eb0c200f5210d800ffd439a5fe82e4
> 1452ec6216337a757a7504bdd55c2906140008500001ffffffffffffffff
> ffffffffffffffffffffffffffffffffffffffffffffffff002050169df9
> 77648fdbffffffffffffffffffffffffffffffffffffffffffffffffffff
> ffffffffffffffffffffffffff0effff215cdcff
>
> / # sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
> 9f56d460181f7c0b6cc16a69554e3b587948b5f65323e976d0a4f1dbbcb93d94 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
>
> / # cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
> Supported read modes by the flash
> 1S-1S-1S
> opcode 0x13
> mode cycles 0
> dummy cycles 0
> 1S-1S-1S (fast read)
> opcode 0x0c
> mode cycles 0
> dummy cycles 8
> 1S-1S-2S
> opcode 0x3c
> mode cycles 0
> dummy cycles 8
> 1S-2S-2S
> opcode 0xbc
> mode cycles 2
> dummy cycles 2
> 1S-1S-4S
> opcode 0x6c
> mode cycles 0
> dummy cycles 8
> 1S-4S-4S
> opcode 0xec
> mode cycles 2
> dummy cycles 4
> 4S-4S-4S
> opcode 0xec
> mode cycles 2
> dummy cycles 4
>
> Supported page program modes by the flash
> 1S-1S-1S
> opcode 0x12
> 1S-1S-4S
> opcode 0x34
>
> / # cat /sys/kernel/debug/spi-nor/spi0.0/params
> name gd25lq256d
> id c8 60 19 c8 60 19
> size 32.0 MiB
> write size 1
> page size 256
> address nbytes 4
> flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | NO_READ_CR | SOFT_RESET
>
> opcodes
> read 0x0c
> dummy cycles 8
> erase 0xdc
> program 0x12
> 8D extension none
>
> protocols
> read 1S-1S-1S
> write 1S-1S-1S
> register 1S-1S-1S
>
> erase commands
> 21 (4.00 KiB) [1]
> 5c (32.0 KiB) [2]
> dc (64.0 KiB) [3]
> c7 (32.0 MiB)
>
> sector map
> region (in hex) | erase mask | overlaid
> ------------------+------------+----------
> 00000000-01ffffff | [ 3] | no
> ---
> drivers/mtd/spi-nor/gigadevice.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
> index ef1edd0ad..356a3f196 100644
> --- a/drivers/mtd/spi-nor/gigadevice.c
> +++ b/drivers/mtd/spi-nor/gigadevice.c
> @@ -82,6 +82,12 @@ static const struct flash_info gigadevice_nor_parts[] = {
> .size = SZ_16M,
> .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> + }, {
> + .id = SNOR_ID(0xc8, 0x60, 0x19),
> + .name = "gd25lq256d",
Drop the .name.
> + .size = SZ_32M,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_QUAD_PP,
Are you sure you need SPI_NOR_QUAD_PP, isn't that covered by the
SFDP? In any case, I think the SPI_NOR_QUAD_PP flag is wrong and
should be replaced, instead a fixup should call
spi_nor_set_pp_settings() directly.
> + .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
The flash supports SFDP, so drop .no_sfdp_flags.
-michael
[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html
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2026-02-13 14:41 [PATCH] mtd: spi-nor: gigadevice: add support for GD25LQ255E Weimin Wu
2026-02-16 8:38 ` Michael Walle
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