On Fri May 29, 2026 at 5:22 PM CEST, Miquel Raynal wrote:
> The benefit is not massive @25MHz, yet it is a supported feature
> of the chip which is already handled by a flag, so let's enable it and
> earn that little 1% write throughput.

If we really go the drop any support for non-SFDP flashes and I'm
still not sure about that. I'd argue that the entry should have been
dropped entirely. Cleanup up the that table instead of adding a
feature you already say isn't that useful, nor do I think is often
used, as these tiny nor flashes are mostly used for read-only
storage (or at least not writing that much).

-michael