From: Rob Herring <robh@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Pratyush Yadav <p.yadav@ti.com>, Michael Walle <michael@walle.cc>,
linux-mtd@lists.infradead.org, linux-renesas-soc@vger.kernel.org,
Magnus Damm <magnus.damm@gmail.com>,
Gareth Williams <gareth.williams.jx@renesas.com>,
Phil Edworthy <phil.edworthy@renesas.com>,
Geert Uytterhoeven <geert@linux-m68k.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: Re: [PATCH v3 1/4] dt-bindings: mtd: rzn1: Describe Renesas RZ/N1 NAND controller
Date: Tue, 14 Dec 2021 13:34:04 -0600 [thread overview]
Message-ID: <YbjxrFyfIz8Qydpb@robh.at.kernel.org> (raw)
In-Reply-To: <20211209143228.525234-2-miquel.raynal@bootlin.com>
On Thu, Dec 09, 2021 at 03:32:25PM +0100, Miquel Raynal wrote:
> Add a Yaml description for this Renesas NAND controller bindings.
>
> Provide a family-specific "rzn1" compatible and a more specific
> "r9a06g032" one.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> .../mtd/renesas,rzn1-nand-controller.yaml | 64 +++++++++++++++++++
> 1 file changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml
> new file mode 100644
> index 000000000000..cc6a358e33d1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/renesas,rzn1-nand-controller.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mtd/renesas,rzn1-nand-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/N1x NAND flash controller device tree bindings
> +
> +maintainers:
> + - Miquel Raynal <miquel.raynal@bootlin.com>
> +
> +allOf:
> + - $ref: "nand-controller.yaml"
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - renesas,r9a06g032-nand-controller
> + - const: renesas,rzn1-nand-controller
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: APB host controller clock
> + - description: External NAND bus clock
> +
> + clock-names:
> + items:
> + - const: nand_hclk
> + - const: nand_eclk
'nand_' is redundant.
> +
> + "#address-cells": true
> + "#size-cells": true
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> +
> +additionalProperties: true
unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/r9a06g032-sysctrl.h>
> +
> + nand-controller@40102000 {
> + compatible = "renesas,r9a06g032-nand-controller",
> + "renesas,rzn1-nand-controller";
> + reg = <0x40102000 0x2000>;
> + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;
> + clock-names = "nand_hclk", "nand_eclk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> --
> 2.27.0
>
>
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next prev parent reply other threads:[~2021-12-14 19:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-09 14:32 [PATCH v3 0/4] Renesas RZ/N1 NAND controller support Miquel Raynal
2021-12-09 14:32 ` [PATCH v3 1/4] dt-bindings: mtd: rzn1: Describe Renesas RZ/N1 NAND controller Miquel Raynal
2021-12-14 19:34 ` Rob Herring [this message]
2021-12-15 15:36 ` Miquel Raynal
2021-12-09 14:32 ` [PATCH v3 2/4] mtd: rawnand: rzn1: Add new NAND controller driver Miquel Raynal
2021-12-09 14:32 ` [PATCH v3 3/4] MAINTAINERS: Add an entry for Renesas RZ/N1 NAND controller Miquel Raynal
2021-12-09 14:32 ` [PATCH v3 4/4] ARM: dts: r9a06g032: Describe " Miquel Raynal
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