linux-mtd.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Abhishek Sahu <absahu@codeaurora.org>
To: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Archit Taneja <architt@codeaurora.org>,
	Richard Weinberger <richard@nod.at>,
	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>,
	linux-mtd <linux-mtd@lists.infradead.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	Andy Gross <andy.gross@linaro.org>,
	Brian Norris <computersforpeace@gmail.com>,
	David Woodhouse <dwmw2@infradead.org>
Subject: Re: [PATCH v3 01/16] mtd: rawnand: helper function for setting up ECC configuration
Date: Wed, 30 May 2018 11:51:26 +0530	[thread overview]
Message-ID: <ae49dcc533007fd6dbdf27d408f5e8ba@codeaurora.org> (raw)
In-Reply-To: <CAK7LNASW4oCekGGkMfmO3tMUviVaium0EOYan6aLFANhL0FAXw@mail.gmail.com>

On 2018-05-30 05:58, Masahiro Yamada wrote:
> Hi.
> 
> 2018-05-30 4:30 GMT+09:00 Boris Brezillon 
> <boris.brezillon@bootlin.com>:
>> On Sat, 26 May 2018 10:42:47 +0200
>> Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>> 
>>> Hi Abhishek,
>>> 
>>> On Fri, 25 May 2018 17:51:29 +0530, Abhishek Sahu
>>> <absahu@codeaurora.org> wrote:
>>> 
>>> > commit 2c8f8afa7f92 ("mtd: nand: add generic helpers to check,
>>> > match, maximize ECC settings") provides generic helpers which
>>> > drivers can use for setting up ECC parameters.
>>> >
>>> > Since same board can have different ECC strength nand chips so
>>> > following is the logic for setting up ECC strength and ECC step
>>> > size, which can be used by most of the drivers.
>>> >
>>> > 1. If both ECC step size and ECC strength are already set
>>> >    (usually by DT) then just check whether this setting
>>> >    is supported by NAND controller.
>>> > 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength
>>> >    supported by NAND controller.
>>> > 3. Otherwise, try to match the ECC step size and ECC strength closest
>>> >    to the chip's requirement. If available OOB size can't fit the chip
>>> >    requirement then select maximum ECC strength which can be fit with
>>> >    available OOB size.
>>> >
>>> > This patch introduces nand_ecc_choose_conf function which calls the
>>> > required helper functions for the above logic. The drivers can use
>>> > this single function instead of calling the 3 helper functions
>>> > individually.
>>> >
>>> > CC: Masahiro Yamada <yamada.masahiro@socionext.com>
>>> > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
>>> > ---
>>> > * Changes from v2:
>>> >
>>> >   1. Renamed function to nand_ecc_choose_conf.
>>> >   2. Minor code reorganization to remove warning and 2 function calls
>>> >      for nand_maximize_ecc.
>>> >
>>> > * Changes from v1:
>>> >   NEW PATCH
>>> >
>>> >  drivers/mtd/nand/raw/nand_base.c | 42 ++++++++++++++++++++++++++++++++++++++++
>>> >  drivers/mtd/nand/raw/nand_base.c | 31 +++++++++++++++++++++++++++++++
>>> >  include/linux/mtd/rawnand.h      |  3 +++
>>> >  2 files changed, 34 insertions(+)
>>> >
>>> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
>>> > index 72f3a89..e52019d 100644
>>> > --- a/drivers/mtd/nand/raw/nand_base.c
>>> > +++ b/drivers/mtd/nand/raw/nand_base.c
>>> > @@ -6249,6 +6249,37 @@ int nand_maximize_ecc(struct nand_chip *chip,
>>> >  }
>>> >  EXPORT_SYMBOL_GPL(nand_maximize_ecc);
>>> >
>>> > +/**
>>> > + * nand_ecc_choose_conf - Set the ECC strength and ECC step size
>>> > + * @chip: nand chip info structure
>>> > + * @caps: ECC engine caps info structure
>>> > + * @oobavail: OOB size that the ECC engine can use
>>> > + *
>>> > + * Choose the ECC configuration according to following logic
>>> > + *
>>> > + * 1. If both ECC step size and ECC strength are already set (usually by DT)
>>> > + *    then check if it is supported by this controller.
>>> > + * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
>>> > + * 3. Otherwise, try to match the ECC step size and ECC strength closest
>>> > + *    to the chip's requirement. If available OOB size can't fit the chip
>>> > + *    requirement then fallback to the maximum ECC step size and ECC strength.
>>> > + *
>>> > + * On success, the chosen ECC settings are set.
>>> > + */
>>> > +int nand_ecc_choose_conf(struct nand_chip *chip,
>>> > +                    const struct nand_ecc_caps *caps, int oobavail)
>>> > +{
>>> > +   if (chip->ecc.size && chip->ecc.strength)
>>> > +           return nand_check_ecc_caps(chip, caps, oobavail);
>>> > +
>>> > +   if (!(chip->ecc.options & NAND_ECC_MAXIMIZE) &&
>>> > +       !nand_match_ecc_req(chip, caps, oobavail))
>>> > +           return 0;
>>> > +
>>> > +   return nand_maximize_ecc(chip, caps, oobavail);
>>> 
>>> I personally don't mind if nand_maximize_ecc() is called twice in
>>> the function if it clarifies the logic. Maybe the following will be
>>> more clear for the user?
>>> 
>>>       if (chip->ecc.size && chip->ecc.strength)
>>>               return nand_check_ecc_caps(chip, caps, oobavail);
>>> 
>>>       if (chip->ecc.options & NAND_ECC_MAXIMIZE)
>>>               return nand_maximize_ecc(chip, caps, oobavail);
>>> 
>>>       if (!nand_match_ecc_req(chip, caps, oobavail))
>>>               return 0;
>>> 
>>>       return nand_maximize_ecc(chip, caps, oobavail);
>> 
>> I personally don't mind, and it seems Masahiro wanted to keep the 
>> logic
>> he had used in the denali driver.
>> 
>>> 
>>> Also, I'm not sure we should just error out when 
>>> nand_check_ecc_caps()
>>> fails. What about something more robust, like:
>>> 
>>>       int ret;
>>> 
>>>       if (chip->ecc.size && chip->ecc.strength) {
>>>               ret = nand_check_ecc_caps(chip, caps, oobavail);
>>>               if (ret)
>>>                       goto maximize_ecc;
>> 
>> Nope. When someone asked for a specific ECC config by passing the
>> nand-ecc-xxx props we should apply it or return an erro if it's not
>> supported. People passing those props should now what the ECC engine
>> supports and pick one valid values.
>> 
>>> 
>>>               return 0;
>>>       }
>>> 
>>>       if (chip->ecc.options & NAND_ECC_MAXIMIZE)
>>>               goto maximize_ecc;
>>> 
>>>       ret = nand_match_ecc_req(chip, caps, oobavail);
>>>       if (ret)
>>>               goto maximize_ecc;
>>> 
>>>       return 0;
>>> 
>>> maximize_ecc:
>>>       return nand_maximize_ecc(chip, caps, oobavail);
>>> 
>> 
>> 
>> ______________________________________________________
>> Linux MTD discussion mailing list
>> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 
> 
> 
> 
> 
> 
> This version looks good to me.
> 
> If you want to check the error code more precisely,
> how about something like follows?
> 
> 
> 
> int nand_ecc_choose_conf(struct nand_chip *chip,
>                         const struct nand_ecc_caps *caps, int oobavail)
> {
>        int ret;
> 
>        if (chip->ecc.size && chip->ecc.strength)
>                return nand_check_ecc_caps(chip, caps, oobavail);
> 
>        if (!(chip->ecc.options & NAND_ECC_MAXIMIZE)) {
>                ret = nand_match_ecc_req(chip, caps, oobavail);
>                if (ret != -ENOTSUPP)
>                        return ret;
>        }
> 
>        return nand_maximize_ecc(chip, caps, oobavail);
> }
> 
> 
> Only the difference is the case
> where nand_match_ecc_req() returns a different error code
> than ENOTSUPP.
> (Currently, this happens only when insane 'oobavail' is passed.)
> 

  We can do that but to me, it will make the helper function
  more complicated. Currently, nand_match_ecc_req is returning
  other than ENOTSUPP 'oobavail < 0' is passed.
  and again in nand_maximize_ecc, we will check for validity
  of oobavail so nothing wrong will happen in calling
  nand_maximize_ecc.

  Anyway we put this under WARN_ON condition

         if (WARN_ON(oobavail < 0))
                 return -EINVAL;

  so if this is being triggered, then it should be mostly
  programming error.

  Thanks,
  Abhishek

> 
> ENOTSUPP means 'required ECC setting is not supported'.
> Other error code is more significant, so it is not a good reason
> to fall back to miximization, IMHO.

  reply	other threads:[~2018-05-30  6:21 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-25 12:21 [PATCH v3 00/16] Update for QCOM NAND driver Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 01/16] mtd: rawnand: helper function for setting up ECC configuration Abhishek Sahu
2018-05-26  8:42   ` Miquel Raynal
2018-05-28  5:46     ` Abhishek Sahu
2018-06-07 12:37       ` Miquel Raynal
2018-06-11  9:16         ` Abhishek Sahu
2018-06-18 10:04           ` Miquel Raynal
2018-05-29 19:30     ` Boris Brezillon
2018-05-30  0:28       ` Masahiro Yamada
2018-05-30  6:21         ` Abhishek Sahu [this message]
2018-05-30  7:38           ` Masahiro Yamada
2018-05-30  8:53             ` Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 02/16] mtd: rawnand: denali: use helper function for ecc setup Abhishek Sahu
2018-05-27  9:26   ` Masahiro Yamada
2018-05-25 12:21 ` [PATCH v3 03/16] dt-bindings: qcom_nandc: make nand-ecc-strength optional Abhishek Sahu
2018-05-26  8:42   ` Miquel Raynal
2018-05-28  5:53     ` Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 04/16] dt-bindings: qcom_nandc: remove nand-ecc-step-size Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 05/16] mtd: rawnand: qcom: remove dt property nand-ecc-step-size Abhishek Sahu
2018-05-26  8:42   ` Miquel Raynal
2018-05-28  5:55     ` Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 06/16] mtd: rawnand: qcom: use the ecc strength from device parameter Abhishek Sahu
2018-05-26  8:43   ` Miquel Raynal
2018-05-28  6:01     ` Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 07/16] mtd: rawnand: qcom: wait for desc completion in all BAM channels Abhishek Sahu
2018-05-26  8:43   ` Miquel Raynal
2018-05-25 12:21 ` [PATCH v3 08/16] mtd: rawnand: qcom: erased page detection for uncorrectable errors only Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 09/16] mtd: rawnand: qcom: fix null pointer access for erased page detection Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 10/16] mtd: rawnand: qcom: parse read errors for read oob also Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 11/16] mtd: rawnand: qcom: modify write_oob to remove read codeword part Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 12/16] mtd: rawnand: qcom: fix return value for raw page read Abhishek Sahu
2018-05-26  8:43   ` Miquel Raynal
2018-05-25 12:21 ` [PATCH v3 13/16] mtd: rawnand: qcom: minor code reorganization for bad block check Abhishek Sahu
2018-05-26  8:46   ` Miquel Raynal
2018-05-28  6:12     ` Abhishek Sahu
2018-05-28  7:03       ` Miquel Raynal
2018-05-28 10:10         ` Abhishek Sahu
2018-06-07 12:53           ` Miquel Raynal
2018-06-11 13:22             ` Abhishek Sahu
2018-06-18 11:35               ` Miquel Raynal
2018-06-20  7:04                 ` Abhishek Sahu
2018-05-26  8:58   ` Miquel Raynal
2018-05-28  6:16     ` Abhishek Sahu
2018-05-28  7:09       ` Miquel Raynal
2018-05-25 12:21 ` [PATCH v3 14/16] mtd: rawnand: qcom: check for operation errors in case of raw read Abhishek Sahu
2018-05-26  8:58   ` Miquel Raynal
2018-05-25 12:21 ` [PATCH v3 15/16] mtd: rawnand: qcom: helper function for " Abhishek Sahu
2018-05-27 13:53   ` Miquel Raynal
2018-05-28  7:34     ` Abhishek Sahu
2018-06-07 12:43       ` Miquel Raynal
2018-06-11  9:19         ` Abhishek Sahu
2018-05-25 12:21 ` [PATCH v3 16/16] mtd: rawnand: qcom: erased page bitflips detection Abhishek Sahu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ae49dcc533007fd6dbdf27d408f5e8ba@codeaurora.org \
    --to=absahu@codeaurora.org \
    --cc=andy.gross@linaro.org \
    --cc=architt@codeaurora.org \
    --cc=boris.brezillon@bootlin.com \
    --cc=computersforpeace@gmail.com \
    --cc=cyrille.pitchen@wedev4u.fr \
    --cc=dwmw2@infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=marek.vasut@gmail.com \
    --cc=miquel.raynal@bootlin.com \
    --cc=richard@nod.at \
    --cc=yamada.masahiro@socionext.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).