From: <Tudor.Ambarus@microchip.com>
To: <boris.brezillon@bootlin.com>
Cc: <marek.vasut@gmail.com>, <dwmw2@infradead.org>,
<computersforpeace@gmail.com>, <richard@nod.at>,
<Cyrille.Pitchen@microchip.com>, <linux-mtd@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table
Date: Wed, 28 Nov 2018 14:17:12 +0000 [thread overview]
Message-ID: <b1052dff-e1a9-2d3f-b921-661c72e0e137@microchip.com> (raw)
In-Reply-To: <20181128085745.1ef607b3@bbrezillon>
On 11/28/2018 09:57 AM, Boris Brezillon wrote:
> On Tue, 20 Nov 2018 11:55:21 +0000
> <Tudor.Ambarus@microchip.com> wrote:
>
>> +
>> + /*
>> + * We set nor->addr_width here to skip spi_nor_set_4byte_opcodes()
>> + * later because this latest function implements a legacy quirk for
>> + * the erase size of Spansion memory. However this quirk is no longer
>> + * needed with new SFDP compliant memories.
>> + */
>> + nor->addr_width = 4;
>> + nor->flags |= SPI_NOR_4B_OPCODES;
>
> You mean SNOR_F_4B_OPCODES (the one introduced here [1]), because
> SPI_NOR_4B_OPCODES should only be used for flash_info->flags and might
> soon conflict with another SNOR_F_ flag?
>
yes, you're right.
> [1]http://patchwork.ozlabs.org/patch/991476/
>
Can you apply your patch? Will submit a new version afterwards.
Thanks,
ta
next prev parent reply other threads:[~2018-11-28 14:17 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-20 11:55 [PATCH] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table Tudor.Ambarus
2018-11-20 15:35 ` kbuild test robot
2018-11-20 15:43 ` Tudor.Ambarus
2018-11-20 17:43 ` kbuild test robot
2018-11-28 7:57 ` Boris Brezillon
2018-11-28 14:17 ` Tudor.Ambarus [this message]
2018-11-28 14:22 ` Boris Brezillon
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