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From: <Tudor.Ambarus@microchip.com>
To: <michael@walle.cc>
Cc: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
	<vigneshr@ti.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Nicolas.Ferre@microchip.com>,
	<Takahiro.Kuwano@infineon.com>
Subject: Re: [PATCH v2 6/8] mtd: spi-nor: core: Add helpers to read/write any register
Date: Mon, 11 Apr 2022 07:29:00 +0000	[thread overview]
Message-ID: <c4dacc1b-d7c5-91d4-8162-2ef4db03f285@microchip.com> (raw)
In-Reply-To: <f3dcb594fbf512faa33361b8bfc7b98f@walle.cc>

On 3/22/22 01:13, Michael Walle wrote:
> Am 2022-02-28 12:17, schrieb Tudor Ambarus:
>> There are manufacturers that use registers indexed by address. Some of
>> them support "read/write any register" opcodes. Provide core methods that
>> can be used by all manufacturers. SPI NOR controller ops are intentionally
>> not supported as we intend to move all the SPI NOR controller drivers
>> under the SPI subsystem.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
>> Tested-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
>> ---
>>  drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++
>>  drivers/mtd/spi-nor/core.h |  4 ++++
>>  2 files changed, 45 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 281e3d25f74c..f1aa1e2ea7c9 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor,
>> loff_t to, size_t len,
>>      return nor->controller_ops->write(nor, to, len, buf);
>>  }
>>
>> +/**
>> + * spi_nor_read_reg() - read register to flash memory
>> + * @nor:        pointer to 'struct spi_nor'.
>> + * @op:        SPI memory operation. op->data.buf must be DMA-able.
>> + * @proto:    SPI protocol to use for the register operation.
>> + *
>> + * Return: zero on success, -errno otherwise
>> + */
>> +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +             enum spi_nor_protocol proto)
>> +{
>> +    if (!nor->spimem)
>> +        return -EOPNOTSUPP;
>> +
>> +    spi_nor_spimem_setup_op(nor, op, proto);
>> +    return spi_nor_spimem_exec_op(nor, op);
>> +}
>> +
>> +/**
>> + * spi_nor_write_reg() - write register to flash memory
>> + * @nor:        pointer to 'struct spi_nor'
>> + * @op:        SPI memory operation. op->data.buf must be DMA-able.
>> + * @proto:    SPI protocol to use for the register operation.
>> + *
>> + * Return: zero on success, -errno otherwise
>> + */
>> +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +              enum spi_nor_protocol proto)
>> +{
>> +    int ret;
>> +
>> +    if (!nor->spimem)
>> +        return -EOPNOTSUPP;
>> +
>> +    ret = spi_nor_write_enable(nor);
>> +    if (ret)
>> +        return ret;
>> +    spi_nor_spimem_setup_op(nor, op, proto);
>> +    return spi_nor_spimem_exec_op(nor, op);
>> +}
>> +
>>  /**
>>   * spi_nor_write_enable() - Set write enable latch with Write Enable command.
>>   * @nor:    pointer to 'struct spi_nor'.
>> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
>> index f952061d5c24..7c704475946d 100644
>> --- a/drivers/mtd/spi-nor/core.h
>> +++ b/drivers/mtd/spi-nor/core.h
>> @@ -554,6 +554,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor,
>> loff_t from, size_t len,
>>                u8 *buf);
>>  ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
>>                 const u8 *buf);
>> +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +             enum spi_nor_protocol proto);
>> +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +              enum spi_nor_protocol proto);
> 
> These look rather odd. I'd expect to see an address and such for
> such a "random register read/write". Looks like these functions

There are at least 6 function parameters if we want to explicitly pass function
arguments: pointer to nor, opcode, addr.nbytes, addr, buf.nbytes, buf. Not to
mention ndummy for reads. A bit too much for me, so I preferred passing spi_mem_op
directly.

> don't do much except calling spi_nor_spimem_setup_op() and
> exec_op() and don't have anything to do with register access
> (except maybe for the write enable). Can't we have a bit more
> sophisticated interface in the core? Something that calls into
> the flash driver to assemble the spi_mem_op automatically? Assuming

Looks liks some ping-pong, passing spi_mem_op directly is straight forward
and can address all manufacturer varieties.

So I prefer keeping these generic methods, it will reduce code duplication.

Thanks,
ta
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  reply	other threads:[~2022-04-11  7:29 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-28 11:17 [PATCH v2 0/8] mtd: spi-nor: Rework Octal DTR methods Tudor Ambarus
2022-02-28 11:17 ` [PATCH v2 1/8] mtd: spi-nor: Rename method, s/spi_nor_match_id/spi_nor_match_name Tudor Ambarus
2022-03-21 11:57   ` Pratyush Yadav
2022-03-21 22:14   ` Michael Walle
2022-02-28 11:17 ` [PATCH v2 2/8] mtd: spi-nor: Introduce spi_nor_match_id() Tudor Ambarus
2022-03-21 12:00   ` Pratyush Yadav
2022-03-21 22:15   ` Michael Walle
2022-02-28 11:17 ` [PATCH v2 3/8] mtd: spi-nor: core: Use auto-detection only once Tudor Ambarus
2022-03-21 12:14   ` Pratyush Yadav
2022-03-21 12:50     ` Tudor.Ambarus
2022-03-21 17:42       ` Pratyush Yadav
2022-03-21 22:38         ` Michael Walle
2022-03-30 18:50           ` Pratyush Yadav
2022-02-28 11:17 ` [PATCH v2 4/8] mtd: spi-nor: core: Introduce method for RDID op Tudor Ambarus
2022-03-21 12:21   ` Pratyush Yadav
2022-03-21 13:18     ` Tudor.Ambarus
2022-03-21 17:39       ` Pratyush Yadav
2022-03-30  6:53         ` Tudor.Ambarus
2022-03-30 18:49           ` Pratyush Yadav
2022-03-21 22:56   ` Michael Walle
2022-03-22  7:32     ` Pratyush Yadav
2022-03-22  8:19       ` Michael Walle
2022-02-28 11:17 ` [PATCH v2 5/8] mtd: spi-nor: manufacturers: Use spi_nor_read_id() core method Tudor Ambarus
2022-03-21 12:27   ` Pratyush Yadav
2022-02-28 11:17 ` [PATCH v2 6/8] mtd: spi-nor: core: Add helpers to read/write any register Tudor Ambarus
2022-03-21 23:13   ` Michael Walle
2022-04-11  7:29     ` Tudor.Ambarus [this message]
2022-02-28 11:17 ` [PATCH v2 7/8] mtd: spi-nor: micron-st: Rework spi_nor_micron_octal_dtr_enable() Tudor Ambarus
2022-03-21 12:33   ` Pratyush Yadav
2022-02-28 11:17 ` [PATCH v2 8/8] mtd: spi-nor: spansion: Rework spi_nor_cypress_octal_dtr_enable() Tudor Ambarus
2022-03-21 12:34   ` Pratyush Yadav
2022-03-21 13:19     ` Tudor.Ambarus

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