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Tue, 2 Apr 2019 03:04:59 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Tue, 2 Apr 2019 03:04:58 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Tue, 2 Apr 2019 03:04:58 -0500 Received: from [172.24.190.89] (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x3284tv8052645; Tue, 2 Apr 2019 03:04:56 -0500 Subject: Re: [PATCH] mtd: spi-nor: Add Micron MT25QU128 support To: , , , , , , , References: <1554217172-30466-1-git-send-email-wan.ahmad.zainie.wan.mohamad@intel.com> From: Vignesh Raghavendra Message-ID: Date: Tue, 2 Apr 2019 13:35:54 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <1554217172-30466-1-git-send-email-wan.ahmad.zainie.wan.mohamad@intel.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190402_010515_860017_0D540EBA X-CRM114-Status: GOOD ( 15.84 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org On 02/04/19 8:29 PM, wan.ahmad.zainie.wan.mohamad@intel.com wrote: > From: Wan Ahmad Zainie > > Add support for Micron 128Mb Serial NOR Flash Memory. > Datasheet is available: MT25Q_QLHS_U_128_ABA_0.pdf > Could you add what board was this tested on and what modes were tested? > Signed-off-by: Wan Ahmad Zainie > --- > drivers/mtd/spi-nor/spi-nor.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index fae147452aff..626ac9e02241 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1881,6 +1881,7 @@ static int sr2_bit7_quad_enable(struct spi_nor *nor) > { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > + { "mt25qu128", INFO(0x20bb18, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > Per datasheet here[1] mt25qu128 does seem to support CHIP erase. So please drop NO_CHIP_ERASE. Micron flash ID table is sorted by device ID. Could you insert the entry accordingly? Also, please limit the line to 80 char like: { "mt25qu128", INFO(0x20bb18, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, [1] https://www.mouser.com/datasheet/2/671/MT25Q_QLHS_U_128_ABA_0-1387216.pdf > /* Micron */ > { > -- Regards Vignesh ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/