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From: Vimal Singh <vimal.newwork@gmail.com>
Date: Tue, 2 Mar 2010 10:25:08 +0530
Message-ID: <ce9ab5791003012055o63d0fd8ejdead7fe5a31ceae4@mail.gmail.com>
Subject: Re: [PATCH - V2] Add NAND lock/unlock routines
To: David Woodhouse <dwmw2@infradead.org>
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On Fri, Feb 26, 2010 at 6:17 PM, David Woodhouse <dwmw2@infradead.org> wrot=
e:
> On Wed, 2010-01-13 at 14:55 +0530, Vimal Singh wrote:
>>
>> >> @@ -2999,8 +3211,8 @@ int nand_scan_tail(struct mtd_info *mtd)
>> >> =A0 =A0 =A0 mtd->read_oob =3D nand_read_oob;
>> >> =A0 =A0 =A0 mtd->write_oob =3D nand_write_oob;
>> >> =A0 =A0 =A0 mtd->sync =3D nand_sync;
>> >> - =A0 =A0 mtd->lock =3D NULL;
>> >> - =A0 =A0 mtd->unlock =3D NULL;
>> >> + =A0 =A0 mtd->lock =3D nand_lock;
>> >> + =A0 =A0 mtd->unlock =3D nand_unlock;
>> >
>> > What makes you believe it is safe to assign these call-backs here?
>> >
>> > AFAICS, this means it will be done for all flashes. Do all of them
>> > support lock/unlock? I did not investigate this, but I think that
>> > probably not.
>>
>> OK. In that case I'll rather not do it here and do it in my specific
>> driver.
>
> Hm, I'm not sure that's the best approach. It's a function of the NAND
> chip, not the controller. We should detect the presence of the feature
> from the chip ID, if at all possible.
>
> I'm happy with your first two patches as part of a three-patch set
> though. Thanks.
>
Thanks David. I'll see the datasheet if chip ID has this information.

--=20
Regards,
Vimal Singh