[PATCH 0/2] New SPI NOR chip IDs

[PATCH 0/2] New SPI NOR chip IDs

[Michal Suchanek]

Hello,

these are flash chips I used when testing spi nor drivers.

GD25Q41B is thoroughly tested, Pm25LD020 is tested but the chip is probably bad
and GD25LQ32C is tested readonly.

Thanks

Michal

Michal Suchanek (2):
  mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID
  MTD: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

 drivers/mtd/spi-nor/spi-nor.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.1.4

[PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Michal Suchanek]

This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
something like 25LQ32VIG in the middle.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b..cba3bd0 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 
 	/* GigaDevice */
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
+	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
 	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
 
-- 
2.1.4

[PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

[Michal Suchanek]

First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB.
Identified as PMC Pm25LD020.
Flash read does not return consistent data which explains why the disk died.

Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based
ESP-01 board. Identified as Giga Devices GD25Q41B.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index cba3bd0..e55689d 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
 
 	/* GigaDevice */
+	{ "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
@@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
 	{ "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
+	{ "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
 	{ "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
 
 	/* Spansion -- single (large) sector size only, at least
-- 
2.1.4

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Marek Vasut]

On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> something like 25LQ32VIG in the middle.
> 
> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index d78831b..cba3bd0 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> 
>  	/* GigaDevice */
>  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
> +	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>  	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },

Don't we have DT bindings, so we can use jedec,spi-nor prop for all
new SPI NORs without growing this table ?

Best regards,
Marek Vasut

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

[Marek Vasut]

On Tuesday, July 28, 2015 at 11:07:58 AM, Michal Suchanek wrote:
> First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB.
> Identified as PMC Pm25LD020.
> Flash read does not return consistent data which explains why the disk
> died.
> 
> Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based
> ESP-01 board. Identified as Giga Devices GD25Q41B.
> 
> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index cba3bd0..e55689d 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>  	{ "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
> 
>  	/* GigaDevice */
> +	{ "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
>  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> @@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>  	/* PMC */
>  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
>  	{ "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
> +	{ "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
>  	{ "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
> 
>  	/* Spansion -- single (large) sector size only, at least

You might want to split this into two patches, but see my comment on 1/2
and please wait for Brian's confirmation there before you do anything.

Thanks!

Best regards,
Marek Vasut

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Michal Suchanek]

On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> something like 25LQ32VIG in the middle.
>>
>> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index d78831b..cba3bd0 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>
>>       /* GigaDevice */
>>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>> +     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>>       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>
> Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> new SPI NORs without growing this table ?

When jedec,spi-nor compatible is used an attempt is made to identify
the chip using this table.

When the ID is not in the table (or is misread due to transfer error)
spi-nor probe fails.

Thanks

Michal

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Marek Vasut]

On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
> On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> >> something like 25LQ32VIG in the middle.
> >> 
> >> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> >> ---
> >> 
> >>  drivers/mtd/spi-nor/spi-nor.c | 1 +
> >>  1 file changed, 1 insertion(+)
> >> 
> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
> >> --- a/drivers/mtd/spi-nor/spi-nor.c
> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >> 
> >>       /* GigaDevice */
> >>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
> >> 
> >> +     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
> >> 
> >>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> >>       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
> > 
> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> > new SPI NORs without growing this table ?
> 
> When jedec,spi-nor compatible is used an attempt is made to identify
> the chip using this table.
> 
> When the ID is not in the table (or is misread due to transfer error)
> spi-nor probe fails.

Dang, I was under the impression we want to avoid growing this table :(

Best regards,
Marek Vasut

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Michal Suchanek]

On 28 July 2015 at 16:38, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, July 28, 2015 at 04:36:29 PM, Michal Suchanek wrote:
>> On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
>> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> >> something like 25LQ32VIG in the middle.
>> >>
>> >> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
>> >> ---
>> >>
>> >>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>> >>  1 file changed, 1 insertion(+)
>> >>
>> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
>> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
>> >> --- a/drivers/mtd/spi-nor/spi-nor.c
>> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>> >>
>> >>       /* GigaDevice */
>> >>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>> >>
>> >> +     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>> >>
>> >>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>> >>       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>> >
>> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
>> > new SPI NORs without growing this table ?
>>
>> When jedec,spi-nor compatible is used an attempt is made to identify
>> the chip using this table.
>>
>> When the ID is not in the table (or is misread due to transfer error)
>> spi-nor probe fails.
>
> Dang, I was under the impression we want to avoid growing this table :(
>

The table not to be grown is the devicetree compatibles table.
jedec,spi-nor should be enough for chips that respond to the ID
command.

BTW jedec is not a registered vendor and adding flash chips to
devicetree causes checkpatch warnings.

Theoretically you could use the ID data to infer block and whole flash
size but code for that is not in the driver. Not sure how many
vendor-specific encodings and exceptions are out there.

Thanks

Michal

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Rafał Miłecki]

On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
>> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
>> something like 25LQ32VIG in the middle.
>>
>> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index d78831b..cba3bd0 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>
>>       /* GigaDevice */
>>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>> +     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>>       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>
> Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> new SPI NORs without growing this table ?

You confused this table with the one in m25p80.c.

-- 
Rafał

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

[Rafał Miłecki]

On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, July 28, 2015 at 11:07:58 AM, Michal Suchanek wrote:
>> First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB.
>> Identified as PMC Pm25LD020.
>> Flash read does not return consistent data which explains why the disk
>> died.
>>
>> Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based
>> ESP-01 board. Identified as Giga Devices GD25Q41B.
>>
>> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index cba3bd0..e55689d 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>       { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE) },
>>
>>       /* GigaDevice */
>> +     { "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
>>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>>       { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
>>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>> @@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
>>       /* PMC */
>>       { "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
>>       { "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
>> +     { "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
>>       { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
>>
>>       /* Spansion -- single (large) sector size only, at least
>
> You might want to split this into two patches, but see my comment on 1/2
> and please wait for Brian's confirmation there before you do anything.

Since these flashes are from 2 different vendors, it may make sense to
use 2 separated patches. I don't care too much however.

Adding these entries is OK in general.

-- 
Rafał

Re: [PATCH 1/2] mtd: spi-nor: Add GD25LQ32C 1.8V SPI NOR flash ID

[Marek Vasut]

On Tuesday, July 28, 2015 at 05:19:18 PM, Rafał Miłecki wrote:
> On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> > On Tuesday, July 28, 2015 at 11:07:57 AM, Michal Suchanek wrote:
> >> This 1.8V SPI NOR flash is found on ARM Chromebook XE303C and reads
> >> something like 25LQ32VIG in the middle.
> >> 
> >> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> >> ---
> >> 
> >>  drivers/mtd/spi-nor/spi-nor.c | 1 +
> >>  1 file changed, 1 insertion(+)
> >> 
> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> >> b/drivers/mtd/spi-nor/spi-nor.c index d78831b..cba3bd0 100644
> >> --- a/drivers/mtd/spi-nor/spi-nor.c
> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
> >> @@ -559,6 +559,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >> 
> >>       /* GigaDevice */
> >>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
> >> 
> >> +     { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
> >> 
> >>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> >>       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
> > 
> > Don't we have DT bindings, so we can use jedec,spi-nor prop for all
> > new SPI NORs without growing this table ?
> 
> You confused this table with the one in m25p80.c.

Uh oh, sorry.

Best regards,
Marek Vasut

Re: [PATCH 2/2] mtd: spi-nor: Add Pm25LD020 and GD25Q41B chip ID.

[Marek Vasut]

On Tuesday, July 28, 2015 at 05:22:17 PM, Rafał Miłecki wrote:
> On 28 July 2015 at 16:33, Marek Vasut <marex@denx.de> wrote:
> > On Tuesday, July 28, 2015 at 11:07:58 AM, Michal Suchanek wrote:
> >> First chip reads Pm25LD020 or Pm25L0020. Found on some WD HDD PCB.
> >> Identified as PMC Pm25LD020.
> >> Flash read does not return consistent data which explains why the disk
> >> died.
> >> 
> >> Second chip reads something like 25Q41BT. Found on Esspif ESP8266 based
> >> ESP-01 board. Identified as Giga Devices GD25Q41B.
> >> 
> >> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> >> ---
> >> 
> >>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
> >>  1 file changed, 2 insertions(+)
> >> 
> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c
> >> b/drivers/mtd/spi-nor/spi-nor.c index cba3bd0..e55689d 100644
> >> --- a/drivers/mtd/spi-nor/spi-nor.c
> >> +++ b/drivers/mtd/spi-nor/spi-nor.c
> >> @@ -558,6 +558,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >> 
> >>       { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SPI_NOR_NO_ERASE)
> >>       },
> >>       
> >>       /* GigaDevice */
> >> 
> >> +     { "gd25q41b", INFO(0xc84013, 0, 64 * 1024,  8, SECT_4K) },
> >> 
> >>       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
> >>       { "gd25lq32c", INFO(0xc86016, 0, 64 * 1024,  64, SECT_4K) },
> >>       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> >> 
> >> @@ -601,6 +602,7 @@ static const struct spi_device_id spi_nor_ids[] = {
> >> 
> >>       /* PMC */
> >>       { "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC)
> >>       }, { "pm25lv010",   INFO(0,        0, 32 * 1024,    4,
> >>       SECT_4K_PMC) },
> >> 
> >> +     { "pm25ld020",   INFO(0x7f9d22, 0, 64 * 1024,    4, SECT_4K) },
> >> 
> >>       { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
> >>       
> >>       /* Spansion -- single (large) sector size only, at least
> > 
> > You might want to split this into two patches, but see my comment on 1/2
> > and please wait for Brian's confirmation there before you do anything.
> 
> Since these flashes are from 2 different vendors, it may make sense to
> use 2 separated patches. I don't care too much however.
> 
> Adding these entries is OK in general.

Thanks for clarifying, I'll make sure to remember this :)

Best regards,
Marek Vasut