From: Marek Vasut <marek.vasut@gmail.com>
To: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.kw@hitachi.com>,
linux-mtd@lists.infradead.org
Cc: Cyrille Pitchen <cyrille.pitchen@atmel.com>,
Jagan Teki <jagan@openedev.com>
Subject: Re: [PATCH v3] mtd: spi-nor: Add support for N25Q256A13
Date: Fri, 10 Mar 2017 04:19:14 +0100 [thread overview]
Message-ID: <d095f785-e092-c474-44f8-e6776c7b8caf@gmail.com> (raw)
In-Reply-To: <a6888235-c6be-53f3-7787-7fafcb56b8b4@wedev4u.fr>
On 03/07/2017 11:11 PM, Cyrille Pitchen wrote:
> Hi Nobuhiro,
>
> Le 02/03/2017 à 03:42, Nobuhiro Iwamatsu a écrit :
>> Add new Micron N25Q256A (N25Q256A13) 256Mbit NOR Flash in the list
> ^
> You mean N25Q256A11, don't you? Otherwise it's not consistent with the
> actual patch!
>
>> of supported devices. This chip has the same structure as the N25Q256A
>> but ID and voltage (1V8) to use is different. Therefore, this adds
>> N25Q256A13 as n25q256ax1.
>
> ^
> N25Q256A11 as n25q256ax1
>
>>
>> In the future, for new Micron memories we could use the patterns
>> "n25q*ax1" for 1V8 and "n25q*ax3" for 3V3 memories.
>>
>
> Sound like a good idea :)
> Marek, do you agree with that?
How would that work ?
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-03-10 3:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-02 2:42 [PATCH v3] mtd: spi-nor: Add support for N25Q256A13 Nobuhiro Iwamatsu
2017-03-07 22:11 ` Cyrille Pitchen
2017-03-10 3:19 ` Marek Vasut [this message]
2017-03-22 5:55 ` 岩松信洋 / IWAMATSU，NOBUHIRO
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