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[118.238.38.77]) by smtp.gmail.com with ESMTPSA id g13sm16591704pjc.39.2021.12.20.02.32.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Dec 2021 02:32:20 -0800 (PST) Message-ID: Date: Mon, 20 Dec 2021 19:32:07 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Subject: Re: How does an SPI NOR handle a single byte write in Octal DTR mode? Content-Language: en-US To: Tudor.Ambarus@microchip.com, Takahiro.Kuwano@infineon.com, juliensu@mxic.com.tw, jaimeliao@mxic.com.tw, Bacem.Daassi@infineon.com, beanhuo@micron.com, shiva.linuxworks@gmail.com, sshivamurthy@micron.com Cc: michael@walle.cc, p.yadav@ti.com, linux-mtd@lists.infradead.org References: From: Takahiro Kuwano In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211220_023229_015772_66C2BD73 X-CRM114-Status: GOOD ( 11.19 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi Tudor, In case of Infineon(Cypress) S28 devices, it can be done by de-asserting chip select before clock falling (not sure typical controllers support this). That means the device can take odd address in 8D-8D-8D mode. Thanks, Takahiro On 12/20/2021 6:36 PM, Tudor.Ambarus@microchip.com wrote: > Hello, > > We're trying to understand how flashes handle single byte writes in > Octal DTR mode, and since we haven't found this info in the datasheets > that we read, you're our only hope. Can you shed some light and let us > now: > 1/ Do the flashes ignore the second byte in Octal DTR mode? Are we forced > to first read the byte that we want to update together with the second byte, > so that when writing in Octal DTR mode to write the 2nd byte that we've just > read, so that we don't change its value? > 2/ Can reads or writes start at an odd address in 8D-8D-8D mode? Pratyush > proposed something at: > https://patchwork.ozlabs.org/project/linux-mtd/list/?series=246518 > Are the assumptions correct in the patch set? > > Feel free to forward this to anyone interested. Thanks. > ta > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ > ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/