From: Michael Walle <michael@walle.cc>
To: Chris Morgan <macroalpha82@gmail.com>
Cc: linux-mtd@lists.infradead.org,
linux-rockchip@lists.infradead.org, andy.yan@rock-chips.com,
yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com,
tudor.ambarus@microchip.com, p.yadav@ti.com, heiko@sntech.de,
robh+dt@kernel.org, vigneshr@ti.com, richard@nod.at,
miquel.raynal@bootlin.com, Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH v2 2/4] spi: rockchip-sfc: Bindings for Rockchip serial flash controller
Date: Fri, 28 May 2021 20:48:29 +0200 [thread overview]
Message-ID: <dd44fda9fa4da9cadf55916fdc4410fb@walle.cc> (raw)
In-Reply-To: <20210528170020.26219-3-macroalpha82@gmail.com>
Am 2021-05-28 19:00, schrieb Chris Morgan:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add binding document for the Rockchip serial flash controller.
> New device specific parameter of rockchip,sfc-no-dma included in
> documentation.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
The subject for this patch should start with "dt-bindings:". See
Documentation/devicetree/bindings/submitting-patches.rst
> ---
> .../spi/rockchip,serialflash-controller.yaml | 107 ++++++++++++++++++
> 1 file changed, 107 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml
> b/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml
> new file mode 100644
> index 000000000000..eb073130e82a
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/spi/rockchip,serialflash-controller.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/spi/rockchip,serialflash-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip SoCs Serial FLASH Controller (SFC)
> +
> +maintainers:
> + - Andy Yan <andy.yan@rock-chips.com>
> +
> +allOf:
> + - $ref: spi-controller.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: rockchip,px30-sfc
> + - const: rockchip,rv1108-sfc
> + - items:
> + - const: rockchip,sfc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 2
> + items:
> + - description: Module Clock
> + - description: Bus Clock
> +
> + clock-names:
> + minItems: 2
> + items:
> + - const: clk-sfc
> + - const: clk-hsfc
> +
> + power-domains:
> + maxItems: 1
> +
> + rockchip,sfc-no-dma:
> + - descrption: Boolean value for disabling DMA
> +
> +patternProperties:
> + "^spi-nor@[0-3]$":
I guess this subnode shouldn't be here, because its alread being taken
care of by the spi-controller.yaml.
> + type: object
> + properties:
> + reg:
> + minimum: 0
> + maximum: 3
> +
> + spi-max-frequency:
> + maxItems: 1
> + - description: Maximum frequency for SPI Flash
> +
> + compatible:
> + oneOf:
> + - const: jedec,spi-nor
> +
> + spi-rx-bus-width:
> + maxItems: 1
> + - description: RX Bus Width (1x, 2x, or 4x mode)
> +
> + spi-tx-bus-width:
> + maxItems: 1
> + - description: TX Bus Width (1x, 2x, or 4x mode)
> +
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/px30-cru.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +sfc: spi@ff3a0000 {
> + compatible = "rockchip,px30-sfc","rockchip,sfc";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x0 0xff3a0000 0x0 0x4000>;
> + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> + clock-names = "sfc", "hsfc";
> + pinctrl-names = "default";
> + pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
> + power-domains = <&power PX30_PD_MMC_NAND>;
> +
> + nor_flash: spi-nor@0 {
flash@0 and the reference could probably be dropped.
> + reg = <0>;
> + compatible = "xtx,xt25f128b","jedec,spi-nor";
This should only be only "jedec,spi-nor".
You can check the schema with dt_bindings_check, see
Documentation/devicetree/bindings/writing-schema.rst
Otherwise, Rob's bot will likely complain.
Please note, that these review comments are just the obvious
ones and I don't have much experience with the schemas. Eg.
the compatible looks fishy, too. But I'm not sure.
-michael
> + spi-rx-bus-width = <2>;
> + spi-tx-bus-width = <2>;
> + spi-max-frequency = <108000000>;
> + };
> +};
> +
> +...
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next prev parent reply other threads:[~2021-05-28 18:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-28 17:00 [PATCH v2 0/4] Add Rockchip SFC(serial flash controller) support Chris Morgan
2021-05-28 17:00 ` [PATCH v2 1/4] spi: rockchip-sfc: add rockchip serial flash controller driver Chris Morgan
2021-05-28 17:00 ` [PATCH v2 2/4] spi: rockchip-sfc: Bindings for Rockchip serial flash controller Chris Morgan
2021-05-28 18:48 ` Michael Walle [this message]
2021-05-28 20:01 ` Chris Morgan
2021-05-29 8:45 ` Johan Jonker
2021-05-31 17:18 ` Chris Morgan
2021-06-01 8:30 ` Heiko Stübner
2021-05-28 17:00 ` [PATCH v2 3/4] arm64: dts: rockchip: Add SFC to PX30 Chris Morgan
2021-05-28 17:00 ` [PATCH v2 4/4] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Chris Morgan
2021-05-31 18:24 ` Pratyush Yadav
2021-05-28 18:49 ` [PATCH v2 0/4] Add Rockchip SFC(serial flash controller) support Michael Walle
2021-05-28 20:03 ` Chris Morgan
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