Re: [PATCH] mtd: spi-nor: intel-spi: Add support for second flash chip

[Michael Walle <michael@walle.cc>]

Am 2021-05-26 11:24, schrieb Mika Westerberg:
> On Wed, May 26, 2021 at 12:12:56PM +0300, Mika Westerberg wrote:
>> Hi,
>> 
>> On Wed, May 26, 2021 at 12:44:16AM +0530, Pratyush Yadav wrote:
>> > Hi,
>> >
>> > On 25/05/21 07:03PM, Mika Westerberg wrote:
>> > > Intel SPI flash controller has been supporting two chip selects long
>> > > time already even if the most common configuration is to have single
>> > > flash chip for the BIOS and related data. This adds support for the
>> > > second chip select if we find out that there are two flash components
>> > > (this information is available in the mandatory flash descriptor on the
>> > > first chip). The second chip is exposed as is without any partition
>> > > information with name "chip1". The first chip continues work as is.
>> > >
>> > > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
>> > > ---
>> > >  drivers/mtd/spi-nor/controllers/intel-spi.c | 208 ++++++++++++++------
>> >
>> > Aren't the drivers in controllers/ supposed to move to use SPI MEM? I
>> > don't know if this has been discussed before, but I would like all
>> > drivers in controllers/ to move to SPI MEM API at some point in the
>> > future. This would let us drop support for this "legacy" controller API
>> > from SPI NOR, cleaning up the core quite a bit. No more if (nor->spimem)
>> > needed anywhere.
>> 
>> What is SPI MEM? :) Looking at the mainline v5.13-rc3 controllers/ 
>> there
>> is no single driver "converted" to SPI MEM, at least from a quick
>> clance.
>> 
>> > I wonder what other folks think about this. I vote for freezing all new
>> > features in controllers/. If you want something new, move to SPI MEM.
>> 
>> I think at this point it is not reasonable to expect that all 
>> controller
>> drivers move to your new framework that has not even landed the
>> mainline ;-) Or did I miss something?
> 
> Oh, I see now this commit:
> 
> a314f6367787 ("mtd: spi-nor: Convert cadence-quadspi to use spi-mem 
> framework")
> 
> So "SPI MEM" means generic SPI subsystem for memory mapped devices.
> Unfortunately Intel controller at least is not capable of running
> generic SPI transactions. It only supports accessing SPI-NOR flashes 
> and
> for those there is small set of commands that supports. I don't think 
> it
> is even possible to convert the driver to generic SPI subsystem.

AFAIK it stands for SPI memory device (memory mapped is not a 
requirement).
Eg. spi-nxp-fspi doesn't support generic SPI devices either, but just 
SPI
flashes. So I'd guess SPI MEM is exactly what you are looking for.

-michael

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