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Fri, 06 Oct 2023 06:33:18 -0700 (PDT) Received: from [192.168.2.107] ([79.115.63.123]) by smtp.gmail.com with ESMTPSA id i11-20020a170906a28b00b009737b8d47b6sm2858073ejz.203.2023.10.06.06.33.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 Oct 2023 06:33:17 -0700 (PDT) Message-ID: Date: Fri, 6 Oct 2023 14:33:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] mtd: micron-st: enable lock/unlock for mt25qu512a To: SHUKLA Mamta Ramendra , "pratyush@kernel.org" , "michael@walle.cc" , "miquel.raynal@bootlin.com" , "richard@nod.at" , "vigneshr@ti.com" , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" Cc: GEO-CHHER-bsp-development References: <20230705154942.3936658-1-mamta.shukla@leica-geosystems.com> <19800e51-a871-be9f-9eb5-5829237e2613@linaro.org> <084ed945-7674-280f-5866-9238473a294d@leica-geosystems.com> <17989610-d069-40e2-9b4d-7ca6bdf2497e@linaro.org> <2d7271b3-dd60-44bb-9700-f6a5295ea873@linaro.org> <372046cb-9135-9a6c-fdb7-307a42f55b30@leica-geosystems.com> Content-Language: en-US From: Tudor Ambarus In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231006_063322_640117_394C6F85 X-CRM114-Status: GOOD ( 15.97 ) X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org Hi, Thanks for the debugging info. On 10/6/23 11:30, SHUKLA Mamta Ramendra wrote: cut > -------------------------------------------------------- > > IMO, HAS_16BIT_SR flag is causing lock/unlock failure, > since BP bits are calculated wrong then. > > I tested also for a case where I don't parse SFDP and > reverted the condition in micron_st_nor_default_init() > for 16BIT Status Register Flag. And lock/unlock fails with > same log as Non-working case. > > And this mt25qu512 has 8-BIT SR as typical micron-st flash. > Indeed, the problem is that HAS_16BIT_SR gets set when it shouldn't have to. This means that the BFPT table of the flash is wrong and we should fix the parsed settings via a post_bfpt hook. Does the following fix your problem? diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index 4afcfc57c896..733bbddc6829 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -180,6 +180,17 @@ static const struct flash_info micron_nor_parts[] = { }, }; +static int mt25qu512a_post_bfpt_fixup(struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header, + const struct sfdp_bfpt *bfpt) +{ + nor->flags &= ~SNOR_F_HAS_16BIT_SR; +} + +static struct spi_nor_fixups mt25qu512a_fixups = { + .post_bfpt = mt25qu512a_post_bfpt_fixup, +} + static const struct flash_info st_nor_parts[] = { { .name = "m25p05-nonjedec", @@ -405,10 +416,10 @@ static const struct flash_info st_nor_parts[] = { }, { .id = SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), .name = "mt25qu512a", - .size = SZ_64M, - .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags = SPI_NOR_4B_OPCODES, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, .mfr_flags = USE_FSR, + .fixups = &mt25qu512a_fixups, }, { .id = SNOR_ID(0x20, 0xbb, 0x20), .name = "n25q512a", If yes, please add some prints in sfdp.c to determine where it's set, either in BFPT_DWORD15_QER_SR2_BIT1 or BFPT_DWORD15_QER_SR2_BIT1_NO_RD Is the datasheet for this flash public? Would you send me a link to it please? Cheers, ta ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/