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From: Michael Walle <michael@walle.cc>
To: "Farber, Eliav" <farbere@amazon.com>
Cc: tudor.ambarus@microchip.com, pratyush@kernel.org,
	miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
	linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
	talel@amazon.com, jonnyc@amazon.com, hhhawa@amazon.com,
	hanochu@amazon.com, itamark@amazon.com, shellykz@amazon.com,
	amitlavi@amazon.com, dkl@amazon.com
Subject: Re: [PATCH v2 1/1] mtd: spi-nor: micron-st: Enable locking for n25q256ax1/mt25qu256a
Date: Wed, 19 Oct 2022 11:38:48 +0200	[thread overview]
Message-ID: <f489048bd1fa65db1a050f1321c640de@walle.cc> (raw)
In-Reply-To: <1ba2e7ff-cf6c-1292-72e0-14b5b5b9282c@amazon.com>

Am 2022-10-19 11:25, schrieb Farber, Eliav:
> On 10/19/2022 11:21 AM, Michael Walle wrote:
>> Hi,
>> 
>> Am 2022-10-19 09:16, schrieb Eliav Farber:
>>> n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 
>>> 0x20bb19)
>>> use the 4 bit Block Protection scheme and support Top/Bottom 
>>> protection
>>> via the BP and TB bits of the Status Register.
>>> BP3 is located in bit 6 of the Status Register.
>>> Tested on both n25q256ax1 and mt25qu256a.
>>> 
>>> [1]
>>> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf 
>>> [2]
>>> https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf
>> 
>> If you respin, you can use a "Link:" tag for the URL above.
> 
> Ack.
> 
>>> Signed-off-by: Eliav Farber <farbere@amazon.com>
>>> ---
>>> xxd -p
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>> 53464450060101ff00060110300000ff84000102800000ffffffffffffff
>>> ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b
>>> 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
>>> 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
>>> ffffffffffffffffffe7ffff21dcffff
>>> 
>>> md5sum
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>> 5ea738216f68c9f98987bb3725699a32
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 
>>> cat
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 
>>> 20bb19104400
>>> 
>>> cat
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname 
>>> mt25qu256a
>>> 
>>> cat
>>> /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer 
>>> st
>> 
>> That's the mt25qu256a SFDP. What about the n25q256ax1?
> 
> On the same card, with same NOR flash memory I'm running two different
> kernel versions.
> First version is quite old - 4.19.239 which does not support mt25qu256a
> and therefore device is detected as n25q256ax1.
> Second version is 6.1.0-rc1 and it detects the same device as 
> mt25qu256a.
> So I was able to dump SFDP when running version 6.1.0-rc1, but not when
> running 4.19.239 which does not support the sysfs to dump the SFPD
> information.
> I checked that locking works with my changes when running on both 
> kernel
> versions.

So you've only tested on an mt25qu256a, correct? Then you should only
add the locking to this flash device. (and maybe backport the mt25qu256a
to your older kernel).

-michael

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  reply	other threads:[~2022-10-19  9:40 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19  7:16 [PATCH v2 1/1] mtd: spi-nor: micron-st: Enable locking for n25q256ax1/mt25qu256a Eliav Farber
2022-10-19  8:21 ` Michael Walle
2022-10-19  9:25   ` Farber, Eliav
2022-10-19  9:38     ` Michael Walle [this message]
2022-10-19  9:52       ` Farber, Eliav
2022-10-19 10:23         ` Michael Walle
2022-10-20  9:15           ` Farber, Eliav

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