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From: <Takahiro.Kuwano@infineon.com>
To: <miquel.raynal@bootlin.com>, <richard@nod.at>
Cc: <vigneshr@ti.com>, <tudor.ambarus@linaro.org>,
	<pratyush@kernel.org>, <michael@walle.cc>,
	<linux-mtd@lists.infradead.org>, <czapiga@google.com>,
	<thomas.petazzoni@bootlin.com>
Subject: RE: [PATCH 1/2] mtd: spi-nor: Fix RDCR controller capability core check
Date: Wed, 11 Mar 2026 07:02:18 +0000	[thread overview]
Message-ID: <fb44fedeb839412eb2c03975eb3ad653@infineon.com> (raw)
In-Reply-To: <873429oxwf.fsf@bootlin.com>

> Hello SPI NOR folks :-)
> 
> + Takahiro
> 
Hello!

> On 08/01/2026 at 13:14:29 +01, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> 
> > Commit 5008c3ec3f89 ("mtd: spi-nor: core: Check read CR support") adds a
> > controller check to make sure the core will not use CR reads on
> > controllers not supporting them. The approach is valid but the fix is
> > incorrect. Unfortunately, the author could not catch it, because the
> > expected behavior was met. The patch indeed drops the RDCR capability,
> > but it does it for all controllers!
> >
> > The issue comes from the use of spi_nor_spimem_check_op() which is an
> > internal helper dedicated to check page operations, ie. it is only used
> > for page reads and page programs (despite its generic name).
> >
> > This helper looks for the biggest number of address bytes that can be
> > used for a page operation and tries 4 then 3. It then calls the usual
> > spi-mem helpers to do the checks. These will always fail because there
> > is now an inconsistency: the address cycles are forced to 4 (then 3)
> > bytes, but the bus width during the address cycles rightfully remains 0:
> > impossible, the operation is invalid.
> >
> > The correct check in this case is to directly call spi_mem_supports_op()
> > which doesn't messes up with the operation content.
> >
> > Fixes: 5008c3ec3f89 ("mtd: spi-nor: core: Check read CR support")
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> 
> These two patches are fixes which need to get in, I'd like to pick them
> for the next fixes MTD PR that I am preparing, but I was expecting some
> kind of acknowledgement on it.
> 
> Cheng Ming already faced the same issue on his side an identical patch
> already.
> 
> Thanks,
> Miquèl
> 
> > ---
> >  drivers/mtd/spi-nor/core.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> > index d3f8a78efd3b..1f2e312feec7 100644
> > --- a/drivers/mtd/spi-nor/core.c
> > +++ b/drivers/mtd/spi-nor/core.c
> > @@ -2466,7 +2466,7 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor *nor, u32 *hwcaps)
> >
> >               spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> >
> > -             if (spi_nor_spimem_check_op(nor, &op))
> > +             if (!spi_mem_supports_op(nor->spimem, &op))
> >                       nor->flags |= SNOR_F_NO_READ_CR;
> >       }
> >  }

Acked-by: Takahiro Kuwano <takahiro.kuwano@infineon.com>

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  parent reply	other threads:[~2026-03-11  7:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-08 12:14 [PATCH 1/2] mtd: spi-nor: Fix RDCR controller capability core check Miquel Raynal
2026-01-08 12:14 ` [PATCH 2/2] mtd: spi-nor: Rename spi_nor_spimem_check_op() Miquel Raynal
2026-03-10  9:54   ` Tudor Ambarus
2026-03-17  9:33     ` Miquel Raynal
2026-03-17 11:39       ` Tudor Ambarus
2026-03-17 13:18         ` Miquel Raynal
2026-03-09 14:55 ` [PATCH 1/2] mtd: spi-nor: Fix RDCR controller capability core check Miquel Raynal
2026-03-10  9:24   ` Tudor Ambarus
2026-03-10  9:38     ` Tudor Ambarus
2026-03-17  9:21       ` Miquel Raynal
2026-03-17  9:20     ` Miquel Raynal
2026-03-17  9:25       ` Tudor Ambarus
2026-03-11  7:02   ` Takahiro.Kuwano [this message]
2026-03-13 11:10   ` Pratyush Yadav
2026-03-13 14:34     ` Miquel Raynal
2026-03-13 16:42       ` Pratyush Yadav

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