From: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
To: Ricard Wanderlof <ricard.wanderlof@axis.com>
Cc: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>
Subject: Re: Problem with Hynix HY27UF081G2A 1Gb NAND flash?
Date: Mon, 22 Sep 2008 14:22:02 +0200 [thread overview]
Message-ID: <lytzc89xqt.fsf@ensc-virt.intern.sigma-chemnitz.de> (raw)
In-Reply-To: <Pine.LNX.4.64.0809221157370.29177@lnxricardw.se.axis.com> (Ricard Wanderlof's message of "Mon, 22 Sep 2008 11:58:26 +0200 (CEST)")
Ricard Wanderlof <ricard.wanderlof@axis.com> writes:
>>> Some Hynix NAND chips seem to have problems with bus arbitration;
>>> e.g. they continue to shift out data when chipselect is
>>> deasserted during a operation (e.g. because ethernet controller
>>> was accessed in this time). We saw this with HY27UG088G5M on
>>> PXA320 and read-page operations.
>> ...
> Did you only see the problem with page read operations, or was
> it a general problem. We don't even seem to get by the ID read
> stage.
We saw this only during page-read operations. But access is
handled completely by the PXA320 which reads data from NAND in
bursts. Hence, nCS won't change during small transfer so that the
brokeness is not triggered at read-id operations.
Enrico
next prev parent reply other threads:[~2008-09-22 12:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-19 12:18 Problem with Hynix HY27UF081G2A 1Gb NAND flash? Ricard Wanderlof
2008-09-19 14:52 ` Jason Liu
2008-09-19 15:28 ` Enrico Scholz
2008-09-22 9:08 ` Ricard Wanderlof
2008-09-22 9:58 ` Ricard Wanderlof
2008-09-22 12:22 ` Enrico Scholz [this message]
[not found] <48D3BA2B.1030005@gmail.com>
2008-09-19 14:53 ` Ricard Wanderlof
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