Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Pratyush Yadav <pratyush@kernel.org>]

On Fri, Feb 07 2025, Tudor Ambarus wrote:

> Hi, Cheng,
>
> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
>> Although certain Macronix NOR flash support the Quad Input Page Program
>> feature, the corresponding information in the 4-byte Address Instruction
>> Table of these flash is not properly filled. As a result, this feature
>> cannot be enabled as expected.
>
> You need to prove that all the flashes that you touch need this fixup,
> i.e. dump their SFDP and show where's the wrong bit in the SFDP table.
>
> Identifying wrong bit in the SFDP tables would be easy to spot if we had
> a SFDP decoder. Something that we all agree that'd be a good thing to
> have, but nobody can allocate time to do it. Pratyush I remember has
> started a draft. Are you interested in introducing a SFDP decoder in
> mtd-utils?

Yes, will do. For now, you can find it here [0]. It doesn't yet support
all the tables but does have the basic ones. Feel free to give it a spin
and let me know if you find any bugs or issues.

I ran it on the SFDP for the first flash in the cover letter and this is
what it says:

    --------------------------------
    4-byte Address Instruction Table
    --------------------------------
    ID: 0xff84
    Major Version: 0x1
    Minor Version: 0x0
    Length (in bytes): 0x08
    +--------------------------------------------------------------------------------------------------+
    |                                             DWORD 1                                              |
    +-------+---------------------------------------------------------------------------------+--------+
    | Bits  | Description                                                                     | Value  |
    +-------+---------------------------------------------------------------------------------+--------+
    | 0     | Support for (1S-1S-1S) READ Command, Instruction=13h                            | 0b1    |
    | 1     | Support for (1S-1S-1S) FAST_READ Command, Instruction=0Ch                       | 0b1    |
    | 2     | Support for (1S-1S-2S) FAST_READ Command, Instruction=3Ch                       | 0b1    |
    | 3     | Support for (1S-2S-2S) FAST_READ Command, Instruction=BCh                       | 0b1    |
    | 4     | Support for (1S-1S-4S) FAST_READ Command, Instruction=6Ch                       | 0b1    |
    | 5     | Support for (1S-4S-4S) FAST_READ Command, Instruction=ECh                       | 0b1    |
    | 6     | Support for (1S-1S-1S) Page Program Command, Instruction=12h                    | 0b1    |
    | 7     | Support for (1S-1S-4S) Page Program Command, Instruction=34h                    | 0b0    |
    | 8     | Support for (1S-4S-4S) Page Program Command, Instruction=3Eh                    | 0b1    |
    | 9     | Support for Erase Command – Type 1 size, Instruction lookup in next Dword       | 0b1    |
    | 10    | Support for Erase Command – Type 2 size, Instruction lookup in next Dword       | 0b1    |
    | 11    | Support for Erase Command – Type 3 size, Instruction lookup in next Dword       | 0b1    |
    | 12    | Support for Erase Command – Type 4 size, Instruction lookup in next Dword       | 0b0    |
    | 13    | Support for (1S-1D-1D) DTR_Read Command, Instruction=0Eh                        | 0b0    |
    | 14    | Support for (1S-2D-2D) DTR_Read Command, Instruction=BEh                        | 0b0    |
    | 15    | Support for (1S-4D-4D) DTR_Read Command, Instruction=EEh                        | 0b1    |
    | 16    | Support for volatile individual sector lock Read command, Instruction=E0h       | 0b1    |
    | 17    | Support for volatile individual sector lock Write command, Instruction=E1h      | 0b1    |
    | 18    | Support for non-volatile individual sector lock read command, Instruction=E2h   | 0b1    |
    | 19    | Support for non-volatile individual sector lock write command, Instruction=E3h  | 0b1    |
    | 20    | Support for (1S-1S-8S) FAST_READ Command, Instruction=7Ch                       | 0b1    |
    | 21    | Support for (1S-8S-8S) FAST_READ Command, Instruction=CCh                       | 0b1    |
    | 22    | Support for (1S-8D-8D) DTR_READ Command, Instruction=FDh                        | 0b1    |
    | 23    | Support for (1S-1S-8S) Page Program Command, Instruction=84h                    | 0b1    |
    | 24    | Support for (1S-8S-8S) Page Program Command, Instruction=8Eh                    | 0b1    |
    | 31:25 | Reserved                                                                        | 0x7f   |
    +-------+---------------------------------------------------------------------------------+--------+
    +--------------------------------------------------------------------------------------------------+
    |                                             DWORD 2                                              |
    +-------------+--------------------------------------------------------------------+---------------+
    | Bits        | Description                                                        | Value         |
    +-------------+--------------------------------------------------------------------+---------------+
    | 7:0         | Instruction for Erase Type 1                                       | 0x21          |
    | 15:8        | Instruction for Erase Type 2                                       | 0x5c          |
    | 23:16       | Instruction for Erase Type 3                                       | 0xdc          |
    | 31:24       | Instruction for Erase Type 4                                       | 0xff          |
    +-------------+--------------------------------------------------------------------+---------------+


>
> Also, if you touch all these flashes, will you please update them and
> get rid of the stray flash info fields? I'm thinking of name, size, and
> no_sfdp_flags.
>

[0] https://github.com/prati0100/parse-sfdp.git

-- 
Regards,
Pratyush Yadav

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