[PATCH 0/2] Add support for Quad Input Page Program

[PATCH 0/2] Add support for Quad Input Page Program

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Support for the Quad Input Page Program feature.

Some Macronix NOR flash support the Quad Input Page Program feature, but
the 4-Byte Address Instruction Table definition in the SFDP is incorrect.
To properly enable this feature, a post_sfdp fixups implementation is
introduced.

Cheng Ming Lin (2):
  mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page
    Program
  mtd: spi-nor: macronix: Add support for Macronix NOR Flash

 drivers/mtd/spi-nor/macronix.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

-- 
2.25.1


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http://lists.infradead.org/mailman/listinfo/linux-mtd/

[PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Although certain Macronix NOR flash support the Quad Input Page Program
feature, the corresponding information in the 4-byte Address Instruction
Table of these flash is not properly filled. As a result, this feature
cannot be enabled as expected.

To address this issue, a post_sfdp fixups implementation is required to
correct the missing information.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
 drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 830da21eea08..ada17999ccbb 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
 	return 0;
 }
 
+static int
+macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
+{
+	/* PP_1_1_4_4B is supported but missing in 4BAIT. */
+	struct spi_nor_flash_parameter *params = nor->params;
+
+	params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
+			SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
+
+	return 0;
+}
+
 static const struct spi_nor_fixups mx25l25635_fixups = {
 	.post_bfpt = mx25l25635_post_bfpt_fixups,
+	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
+};
+
+static const struct spi_nor_fixups macronix_qpp4b_fixups = {
+	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
 };
 
 static const struct flash_info macronix_nor_parts[] = {
@@ -102,11 +120,13 @@ static const struct flash_info macronix_nor_parts[] = {
 		.size = SZ_64M,
 		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixup_flags = SPI_NOR_4B_OPCODES,
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x20, 0x1b),
 		.name = "mx66l1g45g",
 		.size = SZ_128M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x23, 0x14),
 		.name = "mx25v8035f",
@@ -154,18 +174,21 @@ static const struct flash_info macronix_nor_parts[] = {
 		.size = SZ_64M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixup_flags = SPI_NOR_4B_OPCODES,
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x25, 0x3a),
 		.name = "mx66u51235f",
 		.size = SZ_64M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixup_flags = SPI_NOR_4B_OPCODES,
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x25, 0x3c),
 		.name = "mx66u2g45g",
 		.size = SZ_256M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixup_flags = SPI_NOR_4B_OPCODES,
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x26, 0x18),
 		.name = "mx25l12855e",
-- 
2.25.1


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http://lists.infradead.org/mailman/listinfo/linux-mtd/

[PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Due to incorrect values in the 4-BAIT table for these two flash IDs,
it is necessary to add these two flash IDs with fixups.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2201c
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000  53 46 44 50 06 01 02 ff  00 06 01 10 30 00 00 ff  |SFDP........0...|
00000010  c2 00 01 04 10 01 00 ff  84 00 01 02 c0 00 00 ff  |................|
00000020  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000030  e5 20 fb ff ff ff ff 7f  44 eb 08 6b 08 3b 04 bb  |. ......D..k.;..|
00000040  fe ff ff ff ff ff 00 ff  ff ff 44 eb 0c 20 0f 52  |..........D.. .R|
00000050  10 d8 00 ff 87 49 bd 00  84 d2 04 e2 44 03 67 38  |.....I......D.g8|
00000060  30 b0 30 b0 f7 bd ff 5c  4a 9e 29 ff f0 50 f9 85  |0.0....\J.)..P..|
00000070  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000080  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000090  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000a0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000b0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000c0  7f 8f ff ff 21 5c dc ff  ff ff ff ff ff ff ff ff  |....!\..........|
000000d0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000e0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000f0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000100  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000110  00 36 00 27 9d f9 c0 64  85 cb ff ff ff ff ff ff  |.6.'...d........|
00000120
zynq> sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
9af233495e5cffd2f38e9e2b8334a0d51c01fa93e9a17a991f674c8d6a350358  /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
 1S-1S-1S
  opcode        0x13
  mode cycles   0
  dummy cycles  0
 1S-1S-2S
  opcode        0x3c
  mode cycles   0
  dummy cycles  8
 1S-2S-2S
  opcode        0xbc
  mode cycles   0
  dummy cycles  4
 1S-1S-4S
  opcode        0x6c
  mode cycles   0
  dummy cycles  8
 1S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  4
 4S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  4

Supported page program modes by the flash
 1S-1S-1S
  opcode        0x12
 1S-1S-4S
  opcode        0x34
 1S-4S-4S
  opcode        0x3e
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params
name            (null)
id              c2 20 1c c2 20 1c
size            256 MiB
write size      1
page size       256
address nbytes  4
flags           4B_OPCODES | HAS_4BAIT | SOFT_RESET

opcodes
 read           0xec
  dummy cycles  6
 erase          0xdc
 program        0x3e
 8D extension   none

protocols
 read           1S-4S-4S
 write          1S-4S-4S
 register       1S-1S-1S

erase commands
 21 (4.00 KiB) [1]
 5c (32.0 KiB) [2]
 dc (64.0 KiB) [3]
 c7 (256 MiB)

sector map
 region (in hex)   | erase mask | overlaid
 ------------------+------------+----------
 00000000-0fffffff |     [   3] | no
zynq> dd if=/dev/urandom of=/tmp/spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.082418 seconds, 24.3MB/s
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> hexdump /tmp/spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
zynq> sha256sum /tmp/spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
zynq> mtd_debug write /dev/mtd0 0 2097152 /tmp/spi_test
Copied 2097152 bytes from /tmp/spi_test to address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> sha256sum /tmp/spi*
affd6358abe2a75a7edd4d28a9c62bbb25d485c8958993d6e4fbc3de579b8dc0  /tmp/spi_read
affd6358abe2a75a7edd4d28a9c62bbb25d485c8958993d6e4fbc3de579b8dc0  /tmp/spi_test
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> sha256sum /tmp/spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
affd6358abe2a75a7edd4d28a9c62bbb25d485c8958993d6e4fbc3de579b8dc0  /tmp/spi_test

zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 268435456 (256M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0

zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
c2253b
zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
macronix
zynq> hexdump -Cv /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
00000000  53 46 44 50 06 01 02 ff  00 06 01 10 30 00 00 ff  |SFDP........0...|
00000010  c2 00 01 04 10 01 00 ff  84 00 01 02 c0 00 00 ff  |................|
00000020  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000030  e5 20 fb ff ff ff ff 3f  44 eb 08 6b 08 3b 04 bb  |. .....?D..k.;..|
00000040  fe ff ff ff ff ff 00 ff  ff ff 44 eb 0c 20 0f 52  |..........D.. .R|
00000050  10 d8 00 ff 89 49 bd 00  8d 12 00 e2 44 03 67 44  |.....I......D.gD|
00000060  30 b0 30 b0 f7 bd d5 5c  4a 9e 29 ff f0 50 f9 85  |0.0....\J.)..P..|
00000070  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000080  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000090  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000a0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000b0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000c0  7f 8f ff ff 21 5c dc ff  ff ff ff ff ff ff ff ff  |....!\..........|
000000d0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000e0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
000000f0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000100  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
00000110  00 20 00 17 9d f9 c0 64  85 cb ff ff ff ff ff ff  |. .....d........|
00000120
zynq> sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
ef47525560aa30ca7eb4634eb2eb15a0aa618d3b61f774933f9935d05fb475f6  /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
 1S-1S-1S
  opcode        0x13
  mode cycles   0
  dummy cycles  0
 1S-1S-2S
  opcode        0x3c
  mode cycles   0
  dummy cycles  8
 1S-2S-2S
  opcode        0xbc
  mode cycles   0
  dummy cycles  4
 1S-1S-4S
  opcode        0x6c
  mode cycles   0
  dummy cycles  8
 1S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  4
 4S-4S-4S
  opcode        0xec
  mode cycles   2
  dummy cycles  4

Supported page program modes by the flash
 1S-1S-1S
  opcode        0x12
 1S-1S-4S
  opcode        0x34
 1S-4S-4S
  opcode        0x3e

zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params
name            (null)
id              c2 25 3b c2 25 3b
size            128 MiB
write size      1
page size       256
address nbytes  4
flags           4B_OPCODES | HAS_4BAIT | SOFT_RESET

opcodes
 read           0xec
  dummy cycles  6
 erase          0xdc
 program        0x3e
 8D extension   none

protocols
 read           1S-4S-4S
 write          1S-4S-4S
 register       1S-1S-1S

erase commands
 21 (4.00 KiB) [1]
 5c (32.0 KiB) [2]
 dc (64.0 KiB) [3]
 c7 (128 MiB)

sector map
 region (in hex)   | erase mask | overlaid
 ------------------+------------+----------
 00000000-07ffffff |     [   3] | no

zynq> dd if=/dev/urandom of=/tmp/spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.082397 seconds, 24.3MB/s
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> hexdump /tmp/spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
zynq> sha256sum /tmp/spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
zynq> mtd_debug write /dev/mtd0 0 2097152 /tmp/spi_test
Copied 2097152 bytes from /tmp/spi_test to address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> sha256sum /tmp/spi*
8b57e38d293cf08cca7ef239ee70d20d70356ae798c2065576463414e490a759  /tmp/spi_read
8b57e38d293cf08cca7ef239ee70d20d70356ae798c2065576463414e490a759  /tmp/spi_test
zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read
zynq> sha256sum /tmp/spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
8b57e38d293cf08cca7ef239ee70d20d70356ae798c2065576463414e490a759  /tmp/spi_test

zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0

 drivers/mtd/spi-nor/macronix.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index ada17999ccbb..d8c7607b3f22 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -127,6 +127,9 @@ static const struct flash_info macronix_nor_parts[] = {
 		.size = SZ_128M,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixups = &macronix_qpp4b_fixups,
+	}, {
+		.id = SNOR_ID(0xc2, 0x20, 0x1c),
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x23, 0x14),
 		.name = "mx25v8035f",
@@ -182,6 +185,9 @@ static const struct flash_info macronix_nor_parts[] = {
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
 		.fixup_flags = SPI_NOR_4B_OPCODES,
 		.fixups = &macronix_qpp4b_fixups,
+	}, {
+		.id = SNOR_ID(0xc2, 0x25, 0x3b),
+		.fixups = &macronix_qpp4b_fixups,
 	}, {
 		.id = SNOR_ID(0xc2, 0x25, 0x3c),
 		.name = "mx66u2g45g",
-- 
2.25.1


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Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Michael Walle]

Hi Cheng,

> Although certain Macronix NOR flash support the Quad Input Page Program
> feature, the corresponding information in the 4-byte Address 
> Instruction
> Table of these flash is not properly filled. As a result, this feature
> cannot be enabled as expected.
> 
> To address this issue, a post_sfdp fixups implementation is required to
> correct the missing information.
> 
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> ---
>  drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/macronix.c 
> b/drivers/mtd/spi-nor/macronix.c
> index 830da21eea08..ada17999ccbb 100644
> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
>  	return 0;
>  }
> 
> +static int
> +macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
> +{
> +	/* PP_1_1_4_4B is supported but missing in 4BAIT. */
> +	struct spi_nor_flash_parameter *params = nor->params;
> +
> +	params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
> +	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
> +			SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
> +
> +	return 0;
> +}
> +
>  static const struct spi_nor_fixups mx25l25635_fixups = {
>  	.post_bfpt = mx25l25635_post_bfpt_fixups,
> +	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> +};
> +
> +static const struct spi_nor_fixups macronix_qpp4b_fixups = {
> +	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
>  };
> 
>  static const struct flash_info macronix_nor_parts[] = {
> @@ -102,11 +120,13 @@ static const struct flash_info 
> macronix_nor_parts[] = {
>  		.size = SZ_64M,
>  		.no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixup_flags = SPI_NOR_4B_OPCODES,
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x20, 0x1b),
>  		.name = "mx66l1g45g",
>  		.size = SZ_128M,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x23, 0x14),
>  		.name = "mx25v8035f",
> @@ -154,18 +174,21 @@ static const struct flash_info 
> macronix_nor_parts[] = {
>  		.size = SZ_64M,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixup_flags = SPI_NOR_4B_OPCODES,
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x25, 0x3a),
>  		.name = "mx66u51235f",
>  		.size = SZ_64M,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixup_flags = SPI_NOR_4B_OPCODES,
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x25, 0x3c),
>  		.name = "mx66u2g45g",
>  		.size = SZ_256M,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixup_flags = SPI_NOR_4B_OPCODES,
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x26, 0x18),
>  		.name = "mx25l12855e",

Could you also please share the SFDP dumps of these flashes with us?

Thanks,
-michael

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Tudor Ambarus]

Hi, Cheng,

On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
> Although certain Macronix NOR flash support the Quad Input Page Program
> feature, the corresponding information in the 4-byte Address Instruction
> Table of these flash is not properly filled. As a result, this feature
> cannot be enabled as expected.

You need to prove that all the flashes that you touch need this fixup,
i.e. dump their SFDP and show where's the wrong bit in the SFDP table.

Identifying wrong bit in the SFDP tables would be easy to spot if we had
a SFDP decoder. Something that we all agree that'd be a good thing to
have, but nobody can allocate time to do it. Pratyush I remember has
started a draft. Are you interested in introducing a SFDP decoder in
mtd-utils?

Also, if you touch all these flashes, will you please update them and
get rid of the stray flash info fields? I'm thinking of name, size, and
no_sfdp_flags.

Cheers,
ta

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Michael Walle]

Hi Cheng,

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> Due to incorrect values in the 4-BAIT table for these two flash IDs,
> it is necessary to add these two flash IDs with fixups.

What's the part number of these flashes?

> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -127,6 +127,9 @@ static const struct flash_info macronix_nor_parts[] 
> = {
>  		.size = SZ_128M,
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixups = &macronix_qpp4b_fixups,
> +	}, {

Although we don't have .name anymore, a comment like

/* <partname> */

is recommended.

> +		.id = SNOR_ID(0xc2, 0x20, 0x1c),
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x23, 0x14),
>  		.name = "mx25v8035f",
> @@ -182,6 +185,9 @@ static const struct flash_info macronix_nor_parts[] 
> = {
>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>  		.fixup_flags = SPI_NOR_4B_OPCODES,
>  		.fixups = &macronix_qpp4b_fixups,
> +	}, {

same same

> +		.id = SNOR_ID(0xc2, 0x25, 0x3b),
> +		.fixups = &macronix_qpp4b_fixups,
>  	}, {
>  		.id = SNOR_ID(0xc2, 0x25, 0x3c),
>  		.name = "mx66u2g45g",

Thanks,
-michael

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Tudor Ambarus]

On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> Due to incorrect values in the 4-BAIT table for these two flash IDs,
> it is necessary to add these two flash IDs with fixups.
> 
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Michael Walle]

Hi,

> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
>> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>> 
>> Due to incorrect values in the 4-BAIT table for these two flash IDs,
>> it is necessary to add these two flash IDs with fixups.
>> 
>> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>

It would be nice to have some kind of references of the part
numbers in the commit message/subject ;)

-michael

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Tudor Ambarus]

On 2/7/25 9:23 AM, Michael Walle wrote:
> Hi,
> 
>> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
>>> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>>>
>>> Due to incorrect values in the 4-BAIT table for these two flash IDs,
>>> it is necessary to add these two flash IDs with fixups.
>>>
>>> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
>>
>> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> 
> It would be nice to have some kind of references of the part
> numbers in the commit message/subject ;)
> 

Yes, I agree. Cheng can update when sending v2 and still keep my R-b.

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Pratyush Yadav]

On Fri, Feb 07 2025, Michael Walle wrote:

> Hi Cheng,
>
>> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>> Due to incorrect values in the 4-BAIT table for these two flash IDs,
>> it is necessary to add these two flash IDs with fixups.
>
> What's the part number of these flashes?
>
>> --- a/drivers/mtd/spi-nor/macronix.c
>> +++ b/drivers/mtd/spi-nor/macronix.c
>> @@ -127,6 +127,9 @@ static const struct flash_info macronix_nor_parts[] = {
>>  		.size = SZ_128M,
>>  		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
>>  		.fixups = &macronix_qpp4b_fixups,
>> +	}, {
>
> Although we don't have .name anymore, a comment like
>
> /* <partname> */
>
> is recommended.

+1

I have been recommending this in other patches as well. Going through
commit messages can be tricky. This lets us still identify flash entries
easily. Let's recommend this for all patches going forward.

-- 
Regards,
Pratyush Yadav

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Pratyush Yadav]

On Fri, Feb 07 2025, Tudor Ambarus wrote:

> Hi, Cheng,
>
> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
>> Although certain Macronix NOR flash support the Quad Input Page Program
>> feature, the corresponding information in the 4-byte Address Instruction
>> Table of these flash is not properly filled. As a result, this feature
>> cannot be enabled as expected.
>
> You need to prove that all the flashes that you touch need this fixup,
> i.e. dump their SFDP and show where's the wrong bit in the SFDP table.
>
> Identifying wrong bit in the SFDP tables would be easy to spot if we had
> a SFDP decoder. Something that we all agree that'd be a good thing to
> have, but nobody can allocate time to do it. Pratyush I remember has
> started a draft. Are you interested in introducing a SFDP decoder in
> mtd-utils?

Yes, will do. For now, you can find it here [0]. It doesn't yet support
all the tables but does have the basic ones. Feel free to give it a spin
and let me know if you find any bugs or issues.

I ran it on the SFDP for the first flash in the cover letter and this is
what it says:

    --------------------------------
    4-byte Address Instruction Table
    --------------------------------
    ID: 0xff84
    Major Version: 0x1
    Minor Version: 0x0
    Length (in bytes): 0x08
    +--------------------------------------------------------------------------------------------------+
    |                                             DWORD 1                                              |
    +-------+---------------------------------------------------------------------------------+--------+
    | Bits  | Description                                                                     | Value  |
    +-------+---------------------------------------------------------------------------------+--------+
    | 0     | Support for (1S-1S-1S) READ Command, Instruction=13h                            | 0b1    |
    | 1     | Support for (1S-1S-1S) FAST_READ Command, Instruction=0Ch                       | 0b1    |
    | 2     | Support for (1S-1S-2S) FAST_READ Command, Instruction=3Ch                       | 0b1    |
    | 3     | Support for (1S-2S-2S) FAST_READ Command, Instruction=BCh                       | 0b1    |
    | 4     | Support for (1S-1S-4S) FAST_READ Command, Instruction=6Ch                       | 0b1    |
    | 5     | Support for (1S-4S-4S) FAST_READ Command, Instruction=ECh                       | 0b1    |
    | 6     | Support for (1S-1S-1S) Page Program Command, Instruction=12h                    | 0b1    |
    | 7     | Support for (1S-1S-4S) Page Program Command, Instruction=34h                    | 0b0    |
    | 8     | Support for (1S-4S-4S) Page Program Command, Instruction=3Eh                    | 0b1    |
    | 9     | Support for Erase Command – Type 1 size, Instruction lookup in next Dword       | 0b1    |
    | 10    | Support for Erase Command – Type 2 size, Instruction lookup in next Dword       | 0b1    |
    | 11    | Support for Erase Command – Type 3 size, Instruction lookup in next Dword       | 0b1    |
    | 12    | Support for Erase Command – Type 4 size, Instruction lookup in next Dword       | 0b0    |
    | 13    | Support for (1S-1D-1D) DTR_Read Command, Instruction=0Eh                        | 0b0    |
    | 14    | Support for (1S-2D-2D) DTR_Read Command, Instruction=BEh                        | 0b0    |
    | 15    | Support for (1S-4D-4D) DTR_Read Command, Instruction=EEh                        | 0b1    |
    | 16    | Support for volatile individual sector lock Read command, Instruction=E0h       | 0b1    |
    | 17    | Support for volatile individual sector lock Write command, Instruction=E1h      | 0b1    |
    | 18    | Support for non-volatile individual sector lock read command, Instruction=E2h   | 0b1    |
    | 19    | Support for non-volatile individual sector lock write command, Instruction=E3h  | 0b1    |
    | 20    | Support for (1S-1S-8S) FAST_READ Command, Instruction=7Ch                       | 0b1    |
    | 21    | Support for (1S-8S-8S) FAST_READ Command, Instruction=CCh                       | 0b1    |
    | 22    | Support for (1S-8D-8D) DTR_READ Command, Instruction=FDh                        | 0b1    |
    | 23    | Support for (1S-1S-8S) Page Program Command, Instruction=84h                    | 0b1    |
    | 24    | Support for (1S-8S-8S) Page Program Command, Instruction=8Eh                    | 0b1    |
    | 31:25 | Reserved                                                                        | 0x7f   |
    +-------+---------------------------------------------------------------------------------+--------+
    +--------------------------------------------------------------------------------------------------+
    |                                             DWORD 2                                              |
    +-------------+--------------------------------------------------------------------+---------------+
    | Bits        | Description                                                        | Value         |
    +-------------+--------------------------------------------------------------------+---------------+
    | 7:0         | Instruction for Erase Type 1                                       | 0x21          |
    | 15:8        | Instruction for Erase Type 2                                       | 0x5c          |
    | 23:16       | Instruction for Erase Type 3                                       | 0xdc          |
    | 31:24       | Instruction for Erase Type 4                                       | 0xff          |
    +-------------+--------------------------------------------------------------------+---------------+


>
> Also, if you touch all these flashes, will you please update them and
> get rid of the stray flash info fields? I'm thinking of name, size, and
> no_sfdp_flags.
>

[0] https://github.com/prati0100/parse-sfdp.git

-- 
Regards,
Pratyush Yadav

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Cheng Ming Lin]

Hi Michael,

Michael Walle <mwalle@kernel.org> 於 2025年2月7日 週五 下午4:36寫道：
>
> Hi Cheng,
>
> > Although certain Macronix NOR flash support the Quad Input Page Program
> > feature, the corresponding information in the 4-byte Address
> > Instruction
> > Table of these flash is not properly filled. As a result, this feature
> > cannot be enabled as expected.
> >
> > To address this issue, a post_sfdp fixups implementation is required to
> > correct the missing information.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > ---
> >  drivers/mtd/spi-nor/macronix.c | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/mtd/spi-nor/macronix.c
> > b/drivers/mtd/spi-nor/macronix.c
> > index 830da21eea08..ada17999ccbb 100644
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -45,8 +45,26 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
> >       return 0;
> >  }
> >
> > +static int
> > +macronix_qpp4b_post_sfdp_fixups(struct spi_nor *nor)
> > +{
> > +     /* PP_1_1_4_4B is supported but missing in 4BAIT. */
> > +     struct spi_nor_flash_parameter *params = nor->params;
> > +
> > +     params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
> > +     spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_1_4],
> > +                     SPINOR_OP_PP_1_1_4_4B, SNOR_PROTO_1_1_4);
> > +
> > +     return 0;
> > +}
> > +
> >  static const struct spi_nor_fixups mx25l25635_fixups = {
> >       .post_bfpt = mx25l25635_post_bfpt_fixups,
> > +     .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> > +};
> > +
> > +static const struct spi_nor_fixups macronix_qpp4b_fixups = {
> > +     .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> >  };
> >
> >  static const struct flash_info macronix_nor_parts[] = {
> > @@ -102,11 +120,13 @@ static const struct flash_info
> > macronix_nor_parts[] = {
> >               .size = SZ_64M,
> >               .no_sfdp_flags = SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixup_flags = SPI_NOR_4B_OPCODES,
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x20, 0x1b),
> >               .name = "mx66l1g45g",
> >               .size = SZ_128M,
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x23, 0x14),
> >               .name = "mx25v8035f",
> > @@ -154,18 +174,21 @@ static const struct flash_info
> > macronix_nor_parts[] = {
> >               .size = SZ_64M,
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixup_flags = SPI_NOR_4B_OPCODES,
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x25, 0x3a),
> >               .name = "mx66u51235f",
> >               .size = SZ_64M,
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixup_flags = SPI_NOR_4B_OPCODES,
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x25, 0x3c),
> >               .name = "mx66u2g45g",
> >               .size = SZ_256M,
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixup_flags = SPI_NOR_4B_OPCODES,
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x26, 0x18),
> >               .name = "mx25l12855e",
>
> Could you also please share the SFDP dumps of these flashes with us?

Certainly, I can share the SFDP dumps of these flashes with you.
I will send them over shortly.

>
> Thanks,
> -michael

Thanks,
Cheng Ming Lin

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Cheng Ming Lin]

Hi Tudor,

Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年2月7日 週五 下午4:37寫道：
>
> Hi, Cheng,
>
> On 2/7/25 8:18 AM, Cheng Ming Lin wrote:
> > Although certain Macronix NOR flash support the Quad Input Page Program
> > feature, the corresponding information in the 4-byte Address Instruction
> > Table of these flash is not properly filled. As a result, this feature
> > cannot be enabled as expected.
>
> You need to prove that all the flashes that you touch need this fixup,
> i.e. dump their SFDP and show where's the wrong bit in the SFDP table.

Okay, I will dump the SFDP for each of them and point out the
specific errors in the SFDP tables.

>
> Identifying wrong bit in the SFDP tables would be easy to spot if we had
> a SFDP decoder. Something that we all agree that'd be a good thing to
> have, but nobody can allocate time to do it. Pratyush I remember has
> started a draft. Are you interested in introducing a SFDP decoder in
> mtd-utils?
>
> Also, if you touch all these flashes, will you please update them and
> get rid of the stray flash info fields? I'm thinking of name, size, and
> no_sfdp_flags.

No problem. Would removing these stray flash info fields from the
Macronix flash warrant a separate patch series, or should it be included
with the current changes?

>
> Cheers,
> ta

Thanks,
Cheng Ming Lin

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Re: [PATCH 2/2] mtd: spi-nor: macronix: Add support for Macronix NOR Flash

[Cheng Ming Lin]

Hi Michael,

Michael Walle <mwalle@kernel.org> 於 2025年2月7日 週五 下午4:39寫道：
>
> Hi Cheng,
>
> > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> >
> > Due to incorrect values in the 4-BAIT table for these two flash IDs,
> > it is necessary to add these two flash IDs with fixups.
>
> What's the part number of these flashes?
>
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -127,6 +127,9 @@ static const struct flash_info macronix_nor_parts[]
> > = {
> >               .size = SZ_128M,
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixups = &macronix_qpp4b_fixups,
> > +     }, {
>
> Although we don't have .name anymore, a comment like
>
> /* <partname> */
>
> is recommended.

Got it. I'll add the partname comment in v2 and will follow this rule
going forward.

>
> > +             .id = SNOR_ID(0xc2, 0x20, 0x1c),
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x23, 0x14),
> >               .name = "mx25v8035f",
> > @@ -182,6 +185,9 @@ static const struct flash_info macronix_nor_parts[]
> > = {
> >               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> >               .fixup_flags = SPI_NOR_4B_OPCODES,
> >               .fixups = &macronix_qpp4b_fixups,
> > +     }, {
>
> same same
>
> > +             .id = SNOR_ID(0xc2, 0x25, 0x3b),
> > +             .fixups = &macronix_qpp4b_fixups,
> >       }, {
> >               .id = SNOR_ID(0xc2, 0x25, 0x3c),
> >               .name = "mx66u2g45g",
>
> Thanks,
> -michael

Thanks,
Cheng Ming Lin

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Tudor Ambarus]

On 2/10/25 3:27 AM, Cheng Ming Lin wrote:
>> Also, if you touch all these flashes, will you please update them and
>> get rid of the stray flash info fields? I'm thinking of name, size, and
>> no_sfdp_flags.
> No problem. Would removing these stray flash info fields from the
> Macronix flash warrant a separate patch series, or should it be included
> with the current changes?

separate patch please, because removing those fields may introduce
regressions if SFDP data is not sane. You'll need to do the usual
mandatory tests when removing these fields too. But it's worth it,
you'll have cleaner code paths. Thanks!

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Re: [PATCH 1/2] mtd: spi-nor: macronix: Add post_sfdp fixups for Quad Input Page Program

[Cheng Ming Lin]

Hi Tudor,

Tudor Ambarus <tudor.ambarus@linaro.org> 於 2025年2月10日 週一 下午3:48寫道：
>
>
>
> On 2/10/25 3:27 AM, Cheng Ming Lin wrote:
> >> Also, if you touch all these flashes, will you please update them and
> >> get rid of the stray flash info fields? I'm thinking of name, size, and
> >> no_sfdp_flags.
> > No problem. Would removing these stray flash info fields from the
> > Macronix flash warrant a separate patch series, or should it be included
> > with the current changes?
>
> separate patch please, because removing those fields may introduce
> regressions if SFDP data is not sane. You'll need to do the usual
> mandatory tests when removing these fields too. But it's worth it,
> you'll have cleaner code paths. Thanks!

Understood. I will submit a separate patch series to remove those
fields, as you suggested. Thank you for your guidance.

Thanks,
Cheng Ming Lin

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